I try to understand coreboot source for x86 (intel/kblrvp). But I have encountered some difficulties.
In romstage fsp_memory_init, try to find fspm.bin.
if (cbfs_boot_locate(&file_desc, name, NULL)) {
printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name);
die("FSPM not available!\n");
}
But my firmware not contain.
➜ coreboot git:(master) build/cbfstool build/coreboot.rom print
Name Offset Type Size
cbfs master header 0x0 cbfs header 32
fallback/romstage 0x80 stage 36876
cpu_microcode_blob.bin 0x9100 microcode 0
fallback/ramstage 0x9180 stage 75335
vgaroms/seavgabios.bin 0x1b800 raw 27648
config 0x22480 raw 107
revision 0x22540 raw 570
spd.bin 0x227c0 spd 2048
cmos_layout.bin 0x23000 cmos_layout 1132
fallback/postcar 0x234c0 stage 24932
fallback/dsdt.aml 0x29680 raw 16738
fallback/payload 0x2d840 payload 63916
payload_config 0x3d240 raw 1652
payload_revision 0x3d900 raw 234
(empty) 0x3da40 null 1713240
mrc.cache 0x1dfec0 mrc_cache 65536
(empty) 0x1eff00 null 16280
bootblock 0x1f3ec0 bootblock 49152
➜ coreboot git:(master) build/cbfstool build/coreboot.rom layout -w
This image contains the following sections that can be accessed with this tool:
'BIOS' (read-only, size 2097152)
'FMAP' (read-only, size 256)
'COREBOOT' (CBFS, size 2096896)
It is at least possible to perform the read action on every section listed above.