Hello,
I'm trying to configure coreboot for a Lenovo Thinkpad T530 and I need help because for some parts I didn't find any information on the internet. The T530 (Machine Type Model: 24297ZG) has the the following specifications:
Intel Core i5-3230M with Intel HD Graphics 4000 NVIDIA NVS 5400M AUO B156HW01 V.4 FullHD Display Samsung SSD 840 Pro 16 GB RAM
I want to use a Docking Station.
In the future I want to upgrade the following: Intel Core i7-3940XM more and faster RAM eGPU
I'm going to install only some Linux distributions (no Windows). I think I will install OpenSuse which has a modified GRUB2 bootloader, where you can choose from which kernel or snapshot you would like to boot (maybe this information is important for configuring coreboot). Inside the Linux distribution, with graphical environment KDE, I would like to install some virtual machines with QEMU/kvm and there could be also a Windows virtual machine.
I configured everything until now with 'make menuconfig' as listed bellow. Could you please give me some advise which settings I should change and why I should change them. I also wrote some questions behind a few configuration settings (marked with '#####') which I don`t understand. I would really appreciate your help.
1 General setup 1.1 () Local version string 1.2 (fallback) CBFS prefix to use 1.3 Compiler to use (GCC) 1.4 [ ] Allow building with any toolchain 1.5 [ ] Use ccache to speed up (re)compilation 1.6 [ ] Generate flashmap descriptor parser using flex and bison 1.7 [ ] Generate SCONFIG & BINCFG parser using flex and bison 1.8 [*] Use CMOS for configuration values 1.9 [ ] Load default configuration values into CMOS on each boot 1.10 [*] Compress ramstage with LZMA 1.11 [*] Include the coreboot .config file into the ROM image 1.12 [*] Create a table of timestamps collected during boot 1.13 [ ] Print the timestamp values on the console 1.14 [*] Allow use of binary-only repository 1.15 [ ] Code coverage support 1.16 [ ] Undefined behavior sanitizer support 1.17 [ ] Update existing coreboot.rom image 1.18 [ ] Add a bootsplash image
2 Mainboard 2.1 Mainboard Vendor 2.1.1 Lenovo 2.2 Mainboard model 2.2.1 TinkPad T530 2.3 ROM chip size 2.3.1 12 MB 2.4 (0x100000) Size of CBFS filesystem in ROM 2.5 () fmap description file in fmd format
3 Chipset 3.1 -*- Enable VMX for virtualization 3.2 [*] Set lock bit after configuring VMX 3.3 Include CPU microcode in CBFS (Generate from tree) 3.4 () Microcode binary path and filename 3.5 [*] Ignore vendor programmed fuses that limit max. DRAM frequency 3.6 [*] Ignore XMP profile max DIMMs per channel 3.7 Flash locking during chipset lockdown (Don't lock flash sections) 3.8 [*] Lock down chipset in coreboot 3.9 [*] Beep on fatal error 3.10 [*] Flash LEDs on fatal error 3.11 [*] Support bluetooth on wifi cards 3.13 [*] Add Intel descriptor.bin file 3.14 (3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin) Path and filename of the descriptor.bin file 3.15 [*] Add Intel ME/TXE firmware 3.16 (3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin) Path to management engine firmware 3.17 [*] Verify the integrity of the supplied ME/TXE firmware 3.18 [*] Strip down the Intel ME/TXE firmware 3.19 [*] Add gigabit ethernet firmware ##### If I read correctly I need that for internet connection and this bianry has just some configuration in it and no excecutable? So this should be not a privacy concerning thing? 3.20 (3rdparty/blobs/mainboard/$(MAINBOARDDIR)/gbe.bin) Path to gigabit ethernet firmware 3.21 [*] Add EC firmware 3.22 (3rdparty/blobs/mainboard/$(MAINBOARDDIR)/ec.bin) Path to EC firmware 3.23 [*] Lock ME/TXE section 3.24 Bootblock behaviour (Always load fallback)
4 Devices 4.1 Graphics initialization (Use native graphics init) ---> 4.2 Display ---> Framebuffer mode (Legacy VGA text mode) ##### I have no idea what to choose here 4.3 [*] Enable PCIe Clock Power Management ##### I read it should increase battery runtime 4.4 [*] Enable PCIe ASPM L1 SubState ##### I read it should increase battery runtime 4.5 [ ] Early PCI bridge 4.6 (0x0000) Override PCI Subsystem Vendor ID ##### What?! 4.7 (0x0000) Override PCI Subsystem Device ID ##### And again: What?! 4.8 [*] Add a VGA BIOS image ##### I'm not sure if I need a VGA Option ROM. In which cases I need it? What disadvantage do I have if I do not integrate a VGA Option ROM? Will I see GRUB when I boot Linux? How could you value that binary in case of privacy and security? 4.9 (pci8086,0106.rom) VGA BIOS path and filename 4.10 (8086,0106) VGA device PCI IDs 4.11 [*] Add a Video Bios Table (VBT) binary to CBFS ##### Same questions as for the VGA BIOS image 4.12 (src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt) VBT binary path and filename 4.13 [ ] Enable I2C controller emulation in software
5 Generic Drivers 5.1 [ ] AS3722 RTC support 5.2 [ ] Enable protection on MRC settings 5.3 [ ] Disable Fast Read command 5.4 [ ] Serial port on SuperIO 5.5 [ ] Oxford OXPCIe952 5.6 (0x0) UART's PCI bus, device, function address ##### What is that? What I have to insert? 5.7 [ ] USB 2.0 EHCI debug dongle support 5.8 [ ] Support for Vital Product Data tables 5.9 [*] Support Intel PCI-e WiFi adapters ##### If enabled, will this include a binary in the coreboot image? 5.10 [*] PS/2 keyboard init 5.11 [ ] Silicon Image SIL3114 5.12 [ ] TI TPS65913 support 5.13 [ ] TI TPS65913 RTC support
6 Security 6.1 Verified Boot (vboot) ---> 6.2 Trusted Platform Module ---> [*] Deactivate TPM ##### I disabled it because of security/privacy reasons. Any disadvantages when I disable it? 6.2.2 [ ] Output verbose TPM debug messages 6.2.3 [ ] Enable Delay Workaround for TPM
7 Console 7.1 [*] Squelch AP CPUs from early console. 7.2 [ ] spkmodem (console on speaker) console output 7.3 [*] Use onboard VGA as primary video device ##### On coreboot mailinglist I read: make sure you enable ONBOARD_VGA_IS_PRIMARY in your config, otherwise your integrated graphics will be disabled and you'll lose eGPU hotplug. 7.4 [ ] Network console over NE2000 compatible Ethernet adapter 7.5 [*] Send console output to a CBMEM buffer 7.6 (0x20000) Room allocated for console output in CBMEM 7.7 [ ] SPI Flash console output 7.8 Default console log level (0: EMERG) ---> ##### I read that this should decrease boot time. What disadvantages do I have with this setting? 7.9 [ ] Don't show any POST codes ##### What? 7.10 [ ] Store post codes in CMOS for debugging ##### What? 7.11 [ ] Show POST codes on the debug console ##### What? 7.12 [*] Send POST codes to an external device ##### What? 7.13 Device to send POST codes to (None) ##### What? 7.14 [*] Send POST codes to an IO port ##### What? 7.15 (0x80) IO port for POST codes ##### What?
8 System tables 8.1 [*] Generate SMBIOS tables
9 Payload 9.1 Add a payload (SeaBIOS) ---> 9.2 SeaBIOS version (1.11.2) ---> ##### Or should I choose master? 9.3 (10) PS/2 keyboard controller initialization timeout (milliseconds) 9.4 [ ] Hardware init during option ROM execution 9.5 () SeaBIOS config file 9.6 () SeaBIOS bootorder file 9.7 [ ] Add SeaBIOS sercon-port file to CBFS 9.8 (-1) SeaBIOS debug level (verbosity) 9.9 [ ] Add a PXE ROM 9.10 Payload compression algorithm (Use LZMA compression for payloads) ---> 9.11 [ ] FIT support 9.12 [*] Use LZMA compression for secondary payloads 9.13 Secondary Payloads ---> 9.13.1 [*] Load coreinfo as a secondary payload 9.13.2 [ ] Load Memtest86+ as a secondary payload 9.13.3 [*] Load nvramcui as a secondary payload 9.13.4 [ ] Load tint as a secondary payload
10 Debugging 10.1 [ ] Halt when hitting a BUG() or assertion error 10.2 [ ] Output verbose CBFS debug messages 10.3 [ ] Output verbose RAM init debug messages 10.4 [ ] Output verbose SMBus debug messages 10.5 [ ] Output verbose SMI debug messages 10.6 [ ] Debug SMM relocation code 10.7 [ ] Output verbose SPI flash debug messages 10.8 [ ] Trace function calls 10.9 [ ] Debug boot state machine 10.10 [ ] Compile debug code in Ada sources 10.11 [ ] Configure image for EM100 usage
Is there anything else I should take care of with a T530?
Thanks for reading until here ;) Greetings