Zhu,On SiS630ET x8Eh has two active bits:-Bit 0: SDRAM synchronous mode. 0=Enable, 1=DisableBit 1:Relationship between CPU & SDRAM clocks. 0=CPU>SDRAM, 1=CPU<SDRAMDefault value of this register at POR=00hRegards,Nick-----Original Message-----
From: linuxbios-admin@clustermatic.org [mailto:linuxbios-admin@clustermatic.org]On Behalf Of zhu shi song
Sent: 25 July 2004 11:10
To: linuxbios@clustermatic.org
Subject: sis630et memory init problemHi, lists,I've got one ECS p6stmt motherboard based on sis630et. I have dumped pci host bridge settings:P6STMT
00:00.0 Host bridge: Silicon Integrated Systems: Unknown device 0630 (rev 30)
00: 39 10 30 06 07 00 10 22 30 00 00 06 00 20 80 00
10: 00 00 00 d8 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 9e 00 c5 00 00 19 00 01 00 15 51 00 00 00 00 00
60: 0b 00 00 a1 00 00 00 00 01 50 c6 00 e0 00 00 00
70: 3f 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 20 ff 7f 1f 60 00 03 40 00 08 00 00 78 88 00 55
90: 00 00 00 00 40 00 00 01 00 00 00 00 02 00 00 00
a0: 00 00 03 01 aa 00 00 00 00 00 00 00 00 00 f8 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 02 00 20 00 07 02 00 1f 04 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00SPD dump:Memory Type 0x04
Number of Row Address bits 0x0d
Number of Column Address bits 0x0a
Number of Sides 0x01
Number of Banks 0x04I try to set the values just as the same as bios settings. But when ipl use stack, it hangs on copying linuxbios from DOC. It's obvious that memory init failed.I noticed that 0x8e is 0, It's very different with winfast6300's. winfast6300 0x8e is 03.What's the problem behind it?tkszhu
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