coreboot-4.0-r5576M-ip530 Fri May 28 23:29:36 CEST 2010 starting...
SMBus controller enabled
Loading stage image.
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (393216 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-r5576M-ip530 Fri May 28 23:29:36 CEST 2010 booting...
POST: 0x40
Calibrating delay loop...
end 3121830c6e6, start 311de59fc20
32-bit delta 925
calibrate_tsc 32-bit result is 925
clocks_per_usec: 925
Enumerating buses...
Show all devs...Before Device Enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 03f0.0: enabled 0
PNP: 03f0.3: enabled 0
PNP: 03f0.4: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.6: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.a: enabled 0
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 0
PCI: 00:07.3: enabled 0
Compare with tree...
Root Device: enabled 1
 APIC_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:07.0: enabled 1
   PNP: 03f0.0: enabled 0
   PNP: 03f0.3: enabled 0
   PNP: 03f0.4: enabled 1
   PNP: 03f0.5: enabled 1
   PNP: 03f0.7: enabled 1
   PNP: 03f0.6: enabled 1
   PNP: 03f0.8: enabled 1
   PNP: 03f0.a: enabled 0
  PCI: 00:07.1: enabled 1
  PCI: 00:07.2: enabled 0
  PCI: 00:07.3: enabled 0
Setting up IP530-Super I/O devices
--Correcting direct registers
--Register 0x03 = 80 := 0x80
--Register 0x22 = 30 := 0x30
--Register 0x24 = 84 := 0x84
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
POST: 0x5f
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] disabled
PCI: 00:07.3 [8086/7113] bus ops
PCI: 00:07.3 [8086/7113] disabled
malloc Enter, size 228, free_mem_ptr 00120000
malloc 00120000
PCI: 00:0d.0 [1011/0019] enabled
malloc Enter, size 228, free_mem_ptr 001200e4
malloc 001200e4
PCI: 00:0e.0 [1011/0019] enabled
malloc Enter, size 228, free_mem_ptr 001201c8
malloc 001201c8
PCI: 00:0f.0 [104c/ac1c] ops
PCI: 00:0f.0 [104c/ac1c] enabled
malloc Enter, size 228, free_mem_ptr 001202ac
malloc 001202ac
PCI: 00:0f.1 [104c/ac1c] ops
PCI: 00:0f.1 [104c/ac1c] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
POST: 0x24
malloc Enter, size 228, free_mem_ptr 00120390
malloc 00120390
Capability: type 0x01 @ 0xdc
Capability: type 0x01 @ 0xdc
PCI: 01:00.0 [1011/0023] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 01:00.0
PCI: pci_scan_bus for bus 02
POST: 0x24
malloc Enter, size 228, free_mem_ptr 00120474
malloc 00120474
PCI: 02:04.0 [1011/0019] enabled
malloc Enter, size 228, free_mem_ptr 00120558
malloc 00120558
PCI: 02:05.0 [1011/0019] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
scan_static_bus for PCI: 00:07.0
Found SMSC Super I/O (ID=0x44, rev=0x03)
malloc Enter, size 2560, free_mem_ptr 0012063c
malloc 0012063c
PNP: 03f0.0 disabled
PNP: 03f0.3 disabled
PNP: 03f0.4 enabled
PNP: 03f0.5 enabled
PNP: 03f0.7 enabled
PNP: 03f0.6 enabled
PNP: 03f0.8 enabled
PNP: 03f0.a disabled
scan_static_bus for PCI: 00:07.0 done
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 01:00.0 read_resources bus 2 link: 0
PCI: 01:00.0 read_resources bus 2 link: 0 done
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:07.0 read_resources bus 0 link: 0
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:0f.0 register 14(020000a0), read-only ignoring it
PCI: 00:0f.1 register 14(020000a0), read-only ignoring it
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device links 1 child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00
   APIC: 00 links 0 child on link 0 NULL
  PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0 links 0 child on link 0 NULL
   PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 links 1 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0 links 1 child on link 0 PCI: 02:04.0
    PCI: 01:00.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 01:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 01:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:04.0 links 0 child on link 0 NULL
     PCI: 02:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
     PCI: 02:04.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 14
     PCI: 02:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 2200 index 30
     PCI: 02:05.0 links 0 child on link 0 NULL
     PCI: 02:05.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
     PCI: 02:05.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 14
     PCI: 02:05.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 2200 index 30
   PCI: 00:07.0 links 1 child on link 0 PNP: 03f0.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0000200 index 2
   PCI: 00:07.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 03f0.0 links 0 child on link 0 NULL
    PNP: 03f0.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.3 links 0 child on link 0 NULL
    PNP: 03f0.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.4 links 0 child on link 0 NULL
    PNP: 03f0.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 links 0 child on link 0 NULL
    PNP: 03f0.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.5 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.7 links 0 child on link 0 NULL
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 62
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
    PNP: 03f0.6 links 0 child on link 0 NULL
    PNP: 03f0.6 resource base 72 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 03f0.6 resource base 8 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.6 resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index f0
    PNP: 03f0.8 links 0 child on link 0 NULL
    PNP: 03f0.a links 0 child on link 0 NULL
   PCI: 00:07.1 links 0 child on link 0 NULL
   PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:07.2 links 0 child on link 0 NULL
   PCI: 00:07.3 links 0 child on link 0 NULL
   PCI: 00:0d.0 links 0 child on link 0 NULL
   PCI: 00:0d.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
   PCI: 00:0d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 14
   PCI: 00:0d.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 2200 index 30
   PCI: 00:0e.0 links 0 child on link 0 NULL
   PCI: 00:0e.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
   PCI: 00:0e.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 14
   PCI: 00:0e.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 2200 index 30
   PCI: 00:0f.0 links 0 child on link 0 NULL
   PCI: 00:0f.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:0f.0 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index 18
   PCI: 00:0f.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
   PCI: 00:0f.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 20
   PCI: 00:0f.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
   PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 2200 index 30
   PCI: 00:0f.1 links 0 child on link 0 NULL
   PCI: 00:0f.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:0f.1 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index 18
   PCI: 00:0f.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
   PCI: 00:0f.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 20
   PCI: 00:0f.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
   PCI: 00:0f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:00.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:04.0 10 *  [0x0 - 0x7f] io
PCI: 02:05.0 10 *  [0x80 - 0xff] io
PCI: 01:00.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 01:00.0 1c *  [0x0 - 0xfff] io
PCI: 00:01.0 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:01.0 1c *  [0x0 - 0xfff] io
PCI: 00:0d.0 10 *  [0x1000 - 0x107f] io
PCI: 00:0e.0 10 *  [0x1080 - 0x10ff] io
PCI: 00:07.1 20 *  [0x1400 - 0x140f] io
PCI_DOMAIN: 0000 compute_resources_io: base: 1410 size: 1410 align: 12 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:04.0 30 *  [0x0 - 0x3ffff] mem
PCI: 02:05.0 30 *  [0x40000 - 0x7ffff] mem
PCI: 02:04.0 14 *  [0x80000 - 0x803ff] mem
PCI: 02:05.0 14 *  [0x80400 - 0x807ff] mem
PCI: 01:00.0 compute_resources_mem: base: 80800 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 01:00.0 20 *  [0x0 - 0xfffff] mem
PCI: 00:01.0 compute_resources_mem: base: 100000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 20 *  [0x10000000 - 0x100fffff] mem
PCI: 00:0d.0 30 *  [0x10100000 - 0x1013ffff] mem
PCI: 00:0e.0 30 *  [0x10140000 - 0x1017ffff] mem
PCI: 00:0f.0 10 *  [0x10180000 - 0x10180fff] mem
PCI: 00:0f.0 1c *  [0x10181000 - 0x10181fff] mem
PCI: 00:0f.0 20 *  [0x10182000 - 0x10182fff] mem
PCI: 00:0f.0 24 *  [0x10183000 - 0x10183fff] mem
PCI: 00:0f.1 10 *  [0x10184000 - 0x10184fff] mem
PCI: 00:0f.1 1c *  [0x10185000 - 0x10185fff] mem
PCI: 00:0f.1 20 *  [0x10186000 - 0x10186fff] mem
PCI: 00:0f.1 24 *  [0x10187000 - 0x10187fff] mem
PCI: 00:0d.0 14 *  [0x10188000 - 0x101883ff] mem
PCI: 00:0e.0 14 *  [0x10188400 - 0x101887ff] mem
PCI: 00:0f.0 30 *  [0x10188800 - 0x10188803] mem
PCI: 00:0f.1 30 *  [0x10188804 - 0x10188807] mem
PCI: 00:0f.0 18 *  [0x10188808 - 0x10188808] mem
PCI: 00:0f.1 18 *  [0x10188809 - 0x10188809] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 1018880a size: 1018880a align: 28 gran: 0 limit: ffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit 0000ffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 02:04.0
constrain_resources: PCI: 02:05.0
constrain_resources: PCI: 00:07.0
constrain_resources: PNP: 03f0.4
constrain_resources: PNP: 03f0.5
constrain_resources: PNP: 03f0.7
constrain_resources: PNP: 03f0.6
skipping PNP: 03f0.6@62 fixed resource, size=0!
skipping PNP: 03f0.6@70 fixed resource, size=0!
skipping PNP: 03f0.6@f0 fixed resource, size=0!
constrain_resources: PNP: 03f0.8
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:0d.0
constrain_resources: PCI: 00:0e.0
constrain_resources: PCI: 00:0f.0
constrain_resources: PCI: 00:0f.1
avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit 0000ffff
lim->base 00000000 lim->limit 0000ffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:1410 align:12 gran:0 limit:ffff
Assigned: PCI: 00:01.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:0d.0 10 *  [0x2000 - 0x207f] io
Assigned: PCI: 00:0e.0 10 *  [0x2080 - 0x20ff] io
Assigned: PCI: 00:07.1 20 *  [0x2400 - 0x240f] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 2410 size: 1410 align: 12 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:00.0 1c *  [0x1000 - 0x1fff] io
PCI: 00:01.0 allocate_resources_io: next_base: 2000 size: 1000 align: 12 gran: 12 done
PCI: 01:00.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 02:04.0 10 *  [0x1000 - 0x107f] io
Assigned: PCI: 02:05.0 10 *  [0x1080 - 0x10ff] io
PCI: 01:00.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:ffffffffe0000000 size:1018880a align:28 gran:0 limit:ffff
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 10000000 limit ffff
   ffffffffefffffff needs to be <= ffff (limit)
   PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 100000 limit ffff
   ffffffffe00fffff needs to be <= ffff (limit)
   PCI: 00:01.0 20 *  [0x10000000 - 0x100fffff] mem
PCI: 00:01.0 20 *  [0x10000000 - 0x100fffff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 40000 limit ffff
   ffffffffe003ffff needs to be <= ffff (limit)
   PCI: 00:0d.0 30 *  [0x10100000 - 0x1013ffff] mem
PCI: 00:0d.0 30 *  [0x10100000 - 0x1013ffff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 40000 limit ffff
   ffffffffe003ffff needs to be <= ffff (limit)
   PCI: 00:0e.0 30 *  [0x10140000 - 0x1017ffff] mem
PCI: 00:0e.0 30 *  [0x10140000 - 0x1017ffff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.0 10 *  [0x10180000 - 0x10180fff] mem
PCI: 00:0f.0 10 *  [0x10180000 - 0x10180fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.0 1c *  [0x10181000 - 0x10181fff] mem
PCI: 00:0f.0 1c *  [0x10181000 - 0x10181fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.0 20 *  [0x10182000 - 0x10182fff] mem
PCI: 00:0f.0 20 *  [0x10182000 - 0x10182fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.0 24 *  [0x10183000 - 0x10183fff] mem
PCI: 00:0f.0 24 *  [0x10183000 - 0x10183fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.1 10 *  [0x10184000 - 0x10184fff] mem
PCI: 00:0f.1 10 *  [0x10184000 - 0x10184fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.1 1c *  [0x10185000 - 0x10185fff] mem
PCI: 00:0f.1 1c *  [0x10185000 - 0x10185fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.1 20 *  [0x10186000 - 0x10186fff] mem
PCI: 00:0f.1 20 *  [0x10186000 - 0x10186fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1000 limit ffff
   ffffffffe0000fff needs to be <= ffff (limit)
   PCI: 00:0f.1 24 *  [0x10187000 - 0x10187fff] mem
PCI: 00:0f.1 24 *  [0x10187000 - 0x10187fff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 400 limit ffff
   ffffffffe00003ff needs to be <= ffff (limit)
   PCI: 00:0d.0 14 *  [0x10188000 - 0x101883ff] mem
PCI: 00:0d.0 14 *  [0x10188000 - 0x101883ff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 400 limit ffff
   ffffffffe00003ff needs to be <= ffff (limit)
   PCI: 00:0e.0 14 *  [0x10188400 - 0x101887ff] mem
PCI: 00:0e.0 14 *  [0x10188400 - 0x101887ff] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 4 limit ffff
   ffffffffe0000003 needs to be <= ffff (limit)
   PCI: 00:0f.0 30 *  [0x10188800 - 0x10188803] mem
PCI: 00:0f.0 30 *  [0x10188800 - 0x10188803] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 4 limit ffff
   ffffffffe0000003 needs to be <= ffff (limit)
   PCI: 00:0f.1 30 *  [0x10188804 - 0x10188807] mem
PCI: 00:0f.1 30 *  [0x10188804 - 0x10188807] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1 limit ffff
   ffffffffe0000000 needs to be <= ffff (limit)
   PCI: 00:0f.0 18 *  [0x10188808 - 0x10188808] mem
PCI: 00:0f.0 18 *  [0x10188808 - 0x10188808] mem
!! Resource didn't fit !!
   aligned base ffffffffe0000000 size 1 limit ffff
   ffffffffe0000000 needs to be <= ffff (limit)
   PCI: 00:0f.1 18 *  [0x10188809 - 0x10188809] mem
PCI: 00:0f.1 18 *  [0x10188809 - 0x10188809] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: ffffffffe0000000 size: 1018880a align: 28 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:ffff size:0 align:20 gran:20 limit:ffff
PCI: 00:01.0 allocate_resources_prefmem: next_base: ffff size: 0 align: 20 gran: 20 done
PCI: 01:00.0 allocate_resources_prefmem: base:ffff size:0 align:20 gran:20 limit:ffff
PCI: 01:00.0 allocate_resources_prefmem: next_base: ffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:10000000 size:100000 align:20 gran:20 limit:ffff
!! Resource didn't fit !!
   aligned base 10000000 size 100000 limit ffff
   100fffff needs to be <= ffff (limit)
   PCI: 01:00.0 20 *  [0x0 - 0xfffff] mem
PCI: 01:00.0 20 *  [0x0 - 0xfffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: 10000000 size: 100000 align: 20 gran: 20 done
PCI: 01:00.0 allocate_resources_mem: base:0 size:100000 align:20 gran:20 limit:ffff
!! Resource didn't fit !!
   aligned base 0 size 40000 limit ffff
   3ffff needs to be <= ffff (limit)
   PCI: 02:04.0 30 *  [0x0 - 0x3ffff] mem
PCI: 02:04.0 30 *  [0x0 - 0x3ffff] mem
!! Resource didn't fit !!
   aligned base 0 size 40000 limit ffff
   3ffff needs to be <= ffff (limit)
   PCI: 02:05.0 30 *  [0x40000 - 0x7ffff] mem
PCI: 02:05.0 30 *  [0x40000 - 0x7ffff] mem
Assigned: PCI: 02:04.0 14 *  [0x0 - 0x3ff] mem
Assigned: PCI: 02:05.0 14 *  [0x400 - 0x7ff] mem
PCI: 01:00.0 allocate_resources_mem: next_base: 800 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 256 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
ERROR: PCI: 00:00.0 10 prefmem size: 0x0010000000 not assigned
PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x0010000000 - 0x00100fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 01:00.0 24 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 01:00.0 20 <- [0x0000000000 - 0x00000fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 01:00.0 assign_resources, bus 2 link: 0
PCI: 02:04.0 10 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io
PCI: 02:04.0 14 <- [0x0000000000 - 0x00000003ff] size 0x00000400 gran 0x0a mem
ERROR: PCI: 02:04.0 30 romem size: 0x0000040000 not assigned
PCI: 02:05.0 10 <- [0x0000001080 - 0x00000010ff] size 0x00000080 gran 0x07 io
PCI: 02:05.0 14 <- [0x0000000400 - 0x00000007ff] size 0x00000400 gran 0x0a mem
ERROR: PCI: 02:05.0 30 romem size: 0x0000040000 not assigned
PCI: 01:00.0 assign_resources, bus 2 link: 0
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 03f0.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 03f0.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 03f0.5 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned
ERROR: PNP: 03f0.7 62 io size: 0x0000000001 not assigned
ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned
ERROR: PNP: 03f0.7 72 irq size: 0x0000000001 not assigned
PNP: 03f0.6 62 <- [0x0000000072 - 0x0000000071] size 0x00000000 gran 0x00 io
PNP: 03f0.6 70 <- [0x0000000008 - 0x0000000007] size 0x00000000 gran 0x00 irq
PNP: 03f0.6 f0 <- [0x0000000010 - 0x000000000f] size 0x00000000 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:0d.0 10 <- [0x0000002000 - 0x000000207f] size 0x00000080 gran 0x07 io
ERROR: PCI: 00:0d.0 14 mem size: 0x0000000400 not assigned
ERROR: PCI: 00:0d.0 30 romem size: 0x0000040000 not assigned
PCI: 00:0e.0 10 <- [0x0000002080 - 0x00000020ff] size 0x00000080 gran 0x07 io
ERROR: PCI: 00:0e.0 14 mem size: 0x0000000400 not assigned
ERROR: PCI: 00:0e.0 30 romem size: 0x0000040000 not assigned
ERROR: PCI: 00:0f.0 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.0 18 mem size: 0x0000000001 not assigned
ERROR: PCI: 00:0f.0 1c mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.0 20 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.0 24 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.0 30 romem size: 0x0000000004 not assigned
ERROR: PCI: 00:0f.1 10 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.1 18 mem size: 0x0000000001 not assigned
ERROR: PCI: 00:0f.1 1c mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.1 20 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.1 24 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:0f.1 30 romem size: 0x0000000004 not assigned
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device links 1 child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00
   APIC: 00 links 0 child on link 0 NULL
  PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 1000 size 1410 align 12 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base ffffffffe0000000 size 1018880a align 28 gran 0 limit ffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
  PCI_DOMAIN: 0000 resource base c0000 size 3fffff40000 align 0 gran 0 limit 0 flags e0004200 index b
   PCI: 00:00.0 links 0 child on link 0 NULL
   PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffff flags 1200 index 10
   PCI: 00:01.0 links 1 child on link 0 PCI: 01:00.0
   PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:01.0 resource base ffff size 0 align 20 gran 20 limit ffff flags 60081202 index 24
   PCI: 00:01.0 resource base 10000000 size 100000 align 20 gran 20 limit ffff flags 60080202 index 20
    PCI: 01:00.0 links 1 child on link 0 PCI: 02:04.0
    PCI: 01:00.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 01:00.0 resource base ffff size 0 align 20 gran 20 limit ffff flags 60081202 index 24
    PCI: 01:00.0 resource base 0 size 100000 align 20 gran 20 limit ffff flags 60080202 index 20
     PCI: 02:04.0 links 0 child on link 0 NULL
     PCI: 02:04.0 resource base 1000 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
     PCI: 02:04.0 resource base 0 size 400 align 10 gran 10 limit ffff flags 60000200 index 14
     PCI: 02:04.0 resource base 0 size 40000 align 18 gran 18 limit ffff flags 2200 index 30
     PCI: 02:05.0 links 0 child on link 0 NULL
     PCI: 02:05.0 resource base 1080 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
     PCI: 02:05.0 resource base 400 size 400 align 10 gran 10 limit ffff flags 60000200 index 14
     PCI: 02:05.0 resource base 40000 size 40000 align 18 gran 18 limit ffff flags 2200 index 30
   PCI: 00:07.0 links 1 child on link 0 PNP: 03f0.0
   PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0000200 index 2
   PCI: 00:07.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 03f0.0 links 0 child on link 0 NULL
    PNP: 03f0.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.3 links 0 child on link 0 NULL
    PNP: 03f0.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.4 links 0 child on link 0 NULL
    PNP: 03f0.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.5 links 0 child on link 0 NULL
    PNP: 03f0.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.5 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.7 links 0 child on link 0 NULL
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 62
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
    PNP: 03f0.6 links 0 child on link 0 NULL
    PNP: 03f0.6 resource base 72 size 0 align 0 gran 0 limit 0 flags e0000100 index 62
    PNP: 03f0.6 resource base 8 size 0 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.6 resource base 10 size 0 align 0 gran 0 limit 0 flags e0000400 index f0
    PNP: 03f0.8 links 0 child on link 0 NULL
    PNP: 03f0.a links 0 child on link 0 NULL
   PCI: 00:07.1 links 0 child on link 0 NULL
   PCI: 00:07.1 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
   PCI: 00:07.2 links 0 child on link 0 NULL
   PCI: 00:07.3 links 0 child on link 0 NULL
   PCI: 00:0d.0 links 0 child on link 0 NULL
   PCI: 00:0d.0 resource base 2000 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
   PCI: 00:0d.0 resource base 10188000 size 400 align 10 gran 10 limit ffff flags 200 index 14
   PCI: 00:0d.0 resource base 10100000 size 40000 align 18 gran 18 limit ffff flags 2200 index 30
   PCI: 00:0e.0 links 0 child on link 0 NULL
   PCI: 00:0e.0 resource base 2080 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
   PCI: 00:0e.0 resource base 10188400 size 400 align 10 gran 10 limit ffff flags 200 index 14
   PCI: 00:0e.0 resource base 10140000 size 40000 align 18 gran 18 limit ffff flags 2200 index 30
   PCI: 00:0f.0 links 0 child on link 0 NULL
   PCI: 00:0f.0 resource base 10180000 size 1000 align 12 gran 12 limit ffff flags 200 index 10
   PCI: 00:0f.0 resource base 10188808 size 1 align 0 gran 0 limit ffff flags 200 index 18
   PCI: 00:0f.0 resource base 10181000 size 1000 align 12 gran 12 limit ffff flags 200 index 1c
   PCI: 00:0f.0 resource base 10182000 size 1000 align 12 gran 12 limit ffff flags 200 index 20
   PCI: 00:0f.0 resource base 10183000 size 1000 align 12 gran 12 limit ffff flags 200 index 24
   PCI: 00:0f.0 resource base 10188800 size 4 align 2 gran 2 limit ffff flags 2200 index 30
   PCI: 00:0f.1 links 0 child on link 0 NULL
   PCI: 00:0f.1 resource base 10184000 size 1000 align 12 gran 12 limit ffff flags 200 index 10
   PCI: 00:0f.1 resource base 10188809 size 1 align 0 gran 0 limit ffff flags 200 index 18
   PCI: 00:0f.1 resource base 10185000 size 1000 align 12 gran 12 limit ffff flags 200 index 1c
   PCI: 00:0f.1 resource base 10186000 size 1000 align 12 gran 12 limit ffff flags 200 index 20
   PCI: 00:0f.1 resource base 10187000 size 1000 align 12 gran 12 limit ffff flags 200 index 24
   PCI: 00:0f.1 resource base 10188804 size 4 align 2 gran 2 limit ffff flags 2200 index 30
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0083
PCI: 00:01.0 cmd <- 07
PCI: 01:00.0 bridge ctrl <- 0003
PCI: 01:00.0 cmd <- 07
PCI: 02:04.0 cmd <- 07
PCI: 02:05.0 cmd <- 07
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 05
PCI: 00:0d.0 cmd <- 07
PCI: 00:0e.0 cmd <- 07
PCI: 00:0f.0 cmd <- 07
PCI: 00:0f.1 cmd <- 07
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor Intel device 68a
CPU: family 06, model 08, stepping 0a
Using generic cpu ops (good)
POST: 0x60
Enabling cache

Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Zero-sized MTRR range @0KB
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
POST: 0x6a

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
microcode_info: sig = 0x0000068a pf=0x00000010 rev = 0x00000000
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PNP: 03f0.4 init
PNP: 03f0.5 init
PNP: 03f0.7 init
Keyboard init...
No PS/2 keyboard detected.
PNP: 03f0.6 init
PNP: 03f0.8 init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: on
IDE: Primary IDE interface, drive 1: UDMA/33: on
IDE: Secondary IDE interface, drive 0: UDMA/33: on
IDE: Secondary IDE interface, drive 1: UDMA/33: on
PCI: 00:0d.0 init
PCI: 00:0e.0 init
PCI: 00:0f.0 init
Texas Instruments PCMCIA/CardBus controller: initializing hardware
PCI: 00:0f.1 init
Texas Instruments PCMCIA/CardBus controller: initializing hardware
PCI: 02:04.0 init
PCI: 02:05.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 03f0.0: enabled 0
PNP: 03f0.3: enabled 0
PNP: 03f0.4: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.6: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.a: enabled 0
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 0
PCI: 00:07.3: enabled 0
PCI: 00:0d.0: enabled 1
PCI: 00:0e.0: enabled 1
PCI: 00:0f.0: enabled 1
PCI: 00:0f.1: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:04.0: enabled 1
PCI: 02:05.0: enabled 1
POST: 0x89
Initializing CBMEM area to 0xfff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 0fff0200...ok
High Tables Base is fff0000.
POST: 0x9a
Copying Interrupt Routing Table to 0x000f0000... done.
Verifing copy of Interrupt Routing Table at 0x000f0000... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 000f0000.
done.
PIRQ Entry 0 Dev/Fn: 7 Slot: 0
INT: A link: 0 bitmap: 1e20  not routed
INT: B link: 0 bitmap: 1e20  not routed
INT: C link: 0 bitmap: 1e20  not routed
INT: D link: 63 bitmap: 1e20  IRQ: 5
Assigning IRQ 5 to 0:7.2
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 1 Dev/Fn: D Slot: 0
INT: A link: 62 bitmap: 1e20  IRQ: 9
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 9 to 0:d.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 2 Dev/Fn: E Slot: 0
INT: A link: 60 bitmap: 1e20  IRQ: 10
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 10 to 0:e.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 3 Dev/Fn: 4 Slot: 0
INT: A link: 63 bitmap: 1e20  IRQ: 5
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 5 to 2:4.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 4 Dev/Fn: 5 Slot: 0
INT: A link: 61 bitmap: 1e20  IRQ: 11
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 11 to 2:5.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 5 Dev/Fn: F Slot: 0
INT: A link: 63 bitmap: 1e20  IRQ: 5
INT: B link: 61 bitmap: 1e20  IRQ: 11
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 5 to 0:f.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
Assigning IRQ 11 to 0:f.1
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ1: 10
PIRQ2: 11
PIRQ3: 9
PIRQ4: 5
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x0fff0400... done.
Verifing copy of Interrupt Routing Table at 0x0fff0400... done
Checking Interrupt Routing Table consistency...
check_pirq_routing_table(): Interrupt Routing Table located at 0fff0400.
done.
PIRQ Entry 0 Dev/Fn: 7 Slot: 0
INT: A link: 0 bitmap: 1e20  not routed
INT: B link: 0 bitmap: 1e20  not routed
INT: C link: 0 bitmap: 1e20  not routed
INT: D link: 63 bitmap: 1e20  IRQ: 5
Assigning IRQ 5 to 0:7.2
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 1 Dev/Fn: D Slot: 0
INT: A link: 62 bitmap: 1e20  IRQ: 9
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 9 to 0:d.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 2 Dev/Fn: E Slot: 0
INT: A link: 60 bitmap: 1e20  IRQ: 10
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 10 to 0:e.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 3 Dev/Fn: 4 Slot: 0
INT: A link: 63 bitmap: 1e20  IRQ: 5
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 5 to 2:4.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 4 Dev/Fn: 5 Slot: 0
INT: A link: 61 bitmap: 1e20  IRQ: 11
INT: B link: 0 bitmap: 0  not routed
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 11 to 2:5.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ Entry 5 Dev/Fn: F Slot: 0
INT: A link: 63 bitmap: 1e20  IRQ: 5
INT: B link: 61 bitmap: 1e20  IRQ: 11
INT: C link: 0 bitmap: 0  not routed
INT: D link: 0 bitmap: 0  not routed
Assigning IRQ 5 to 0:f.0
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
Assigning IRQ 11 to 0:f.1
i8259_configure_irq_trigger: current interrupts are 0xe20
i8259_configure_irq_trigger: try to set interrupts 0xe20
PIRQ1: 10
PIRQ2: 11
PIRQ3: 9
PIRQ4: 5
PIRQ table: 128 bytes.
POST: 0x9d
Multiboot Information structure has been written.
POST: 0x9d
Adding CBMEM entry as no. 3
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum dbdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x0fff1400
rom_table_end = 0x0fff1400
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x0fff1400 to 0x10000000 
Adding high table area
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000000ffeffff: RAM
 3. 000000000fff0000-000000000fffffff: CONFIGURATION TABLES
 4. 0000000010000000-000003ffffffffff: RAM
Wrote coreboot table at: 0fff1400 - 0fff15bc  checksum cb4e
coreboot table: 444 bytes.
POST: 0x9e
 0. FREE SPACE 0fff3400 0000cc00
 1. GDT        0fff0200 00000200
 2. IRQ TABLE  0fff0400 00001000
 3. COREBOOT   0fff1400 00002000
Check CBFS header at ffffffff
$S0b#e5