diff --git a/lib/Kconfig b/lib/Kconfig index 6c695ff..172c721 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -91,6 +91,8 @@ config AUDIT_GENERIC depends on AUDIT && !AUDIT_ARCH default y +source "lib/libpayload/Kconfig" + # # compression support is select'ed if needed # diff --git a/lib/Makefile b/lib/Makefile index 15f7bb6..5af01ee 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -72,6 +72,7 @@ obj-$(CONFIG_BCH) += bch.o obj-$(CONFIG_LZO_COMPRESS) += lzo/ obj-$(CONFIG_LZO_DECOMPRESS) += lzo/ obj-$(CONFIG_XZ_DEC) += xz/ +obj-$(CONFIG_LIBPAYLOAD) += libpayload/ obj-$(CONFIG_RAID6_PQ) += raid6/ lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o diff -urN a/include/linux/libpayload/coreboot_tables.h b/include/linux/libpayload/coreboot_tables.h --- a/include/linux/libpayload/coreboot_tables.h 1969-12-31 17:00:00.000000000 -0700 +++ b/include/linux/libpayload/coreboot_tables.h 2011-08-21 15:08:42.000000000 -0600 @@ -0,0 +1,255 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2011 Philip Prindeville, Redfish Solutions, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _COREBOOT_TABLES_H +#define _COREBOOT_TABLES_H + +struct cbuint64 { + u32 lo; + u32 hi; +}; + +struct cb_header { + u8 signature[4]; + u32 header_bytes; + u32 header_checksum; + u32 table_bytes; + u32 table_checksum; + u32 table_entries; +}; + +struct cb_record { + u32 tag; + u32 size; +}; + +#define CB_TAG_UNUSED 0x0000 +#define CB_TAG_MEMORY 0x0001 + +struct cb_memory_range { + struct cbuint64 start; + struct cbuint64 size; + u32 type; +}; + +#define CB_MEM_RAM 1 +#define CB_MEM_RESERVED 2 +#define CB_MEM_TABLE 16 + +struct cb_memory { + u32 tag; + u32 size; + struct cb_memory_range map[0]; +}; + +#define CB_TAG_HWRPB 0x0002 + +struct cb_hwrpb { + u32 tag; + u32 size; + u64 hwrpb; +}; + +#define CB_TAG_MAINBOARD 0x0003 + +struct cb_mainboard { + u32 tag; + u32 size; + u8 vendor_idx; + u8 part_number_idx; + u8 strings[0]; +}; + +#define CB_TAG_VERSION 0x0004 +#define CB_TAG_EXTRA_VERSION 0x0005 +#define CB_TAG_BUILD 0x0006 +#define CB_TAG_COMPILE_TIME 0x0007 +#define CB_TAG_COMPILE_BY 0x0008 +#define CB_TAG_COMPILE_HOST 0x0009 +#define CB_TAG_COMPILE_DOMAIN 0x000a +#define CB_TAG_COMPILER 0x000b +#define CB_TAG_LINKER 0x000c +#define CB_TAG_ASSEMBLER 0x000d + +struct cb_string { + u32 tag; + u32 size; + u8 string[0]; +}; + +#define CB_TAG_SERIAL 0x000f + +struct cb_serial { + u32 tag; + u32 size; + u16 ioport; +}; + +#define CB_TAG_CONSOLE 0x0010 + +struct cb_console { + u32 tag; + u32 size; + u16 type; +}; + +#define CB_TAG_CONSOLE_SERIAL8250 0 +#define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */ +#define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */ +#define CB_TAG_CONSOLE_LOGBUF 3 +#define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */ +#define CB_TAG_CONSOLE_EHCI 5 + +#define CB_TAG_FORWARD 0x00011 + +struct cb_forward { + u32 tag; + u32 size; + u64 forward; +}; + +#define CB_TAG_FRAMEBUFFER 0x0012 +struct cb_framebuffer { + u32 tag; + u32 size; + + u64 physical_address; + u32 x_resolution; + u32 y_resolution; + u32 bytes_per_line; + u8 bits_per_pixel; + u8 red_mask_pos; + u8 red_mask_size; + u8 green_mask_pos; + u8 green_mask_size; + u8 blue_mask_pos; + u8 blue_mask_size; + u8 reserved_mask_pos; + u8 reserved_mask_size; +}; + +#define CB_TAG_CMOS_OPTION_TABLE 0x00c8 +struct cb_cmos_option_table { + u32 tag; + u32 size; + u32 header_length; +}; + +#define CB_TAG_OPTION 0x00c9 +#define CMOS_MAX_NAME_LENGTH 32 +struct cb_cmos_entries { + u32 tag; + u32 size; + u32 bit; + u32 length; + u32 config; + u32 config_id; + u8 name[CMOS_MAX_NAME_LENGTH]; +}; + + +#define CB_TAG_OPTION_ENUM 0x00ca +#define CMOS_MAX_TEXT_LENGTH 32 +struct cb_cmos_enums { + u32 tag; + u32 size; + u32 config_id; + u32 value; + u8 text[CMOS_MAX_TEXT_LENGTH]; +}; + +#define CB_TAG_OPTION_DEFAULTS 0x00cb +#define CMOS_IMAGE_BUFFER_SIZE 128 +struct cb_cmos_defaults { + u32 tag; + u32 size; + u32 name_length; + u8 name[CMOS_MAX_NAME_LENGTH]; + u8 default_set[CMOS_IMAGE_BUFFER_SIZE]; +}; + +#define CB_TAG_OPTION_CHECKSUM 0x00cc +#define CHECKSUM_NONE 0 +#define CHECKSUM_PCBIOS 1 +struct cb_cmos_checksum { + u32 tag; + u32 size; + u32 range_start; + u32 range_end; + u32 location; + u32 type; +}; + +/* Helpful macros */ + +#define MEM_RANGE_COUNT(_rec) \ + (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0])) + +#define MEM_RANGE_PTR(_rec, _idx) \ + (void *)(((caddr_t *) (_rec)) + sizeof(*(_rec)) \ + + (sizeof((_rec)->map[0]) * (_idx))) + +/* Trivial helper functions */ + +static inline const u8 *cb_mb_vendor_string(const struct cb_mainboard *cbm) +{ + return cbm->strings + cbm->vendor_idx; +} + +static inline const u8 *cb_mb_part_string(const struct cb_mainboard *cbm) +{ + return cbm->strings + cbm->part_number_idx; +} + +static inline u64 cb_unpack64(struct cbuint64 val) +{ + return (((u64) val.hi) << 32) | val.lo; +} + +static inline void *cb_page_base(void *ptr) +{ + return (void *)(((uintptr_t) ptr) & PAGE_MASK); +} + +static inline uintptr_t cb_page_offset(void *ptr) +{ + return (((uintptr_t) ptr) & ~PAGE_MASK); +} + +static inline __sum16 cb_checksum(const void *ptr, unsigned len) +{ + return ip_compute_csum(ptr, len); +} + +/* Intra-module -- not exported */ +extern int cb_parse_header(void *addr, void *end, struct cb_sysinfo *info); +extern int cb_get_coreboot_tables(struct cb_sysinfo *info); + +#endif diff -urN a/include/linux/libpayload/sysinfo.h b/include/linux/libpayload/sysinfo.h --- a/include/linux/libpayload/sysinfo.h 1969-12-31 17:00:00.000000000 -0700 +++ b/include/linux/libpayload/sysinfo.h 2011-08-20 17:05:50.000000000 -0600 @@ -0,0 +1,73 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2011 Philip Prindeville, Redfish Solutions, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _SYSINFO_H +#define _SYSINFO_H + +/* Allow a maximum of 16 memory range definitions. */ +#define SYSINFO_MAX_MEM_RANGES 16 + +struct cb_sysinfo { + unsigned int cpu_khz; + unsigned short ser_ioport; + unsigned long ser_base; /* for mmapped serial */ + + unsigned int n_memranges; + + struct memrange { + unsigned long long base; + unsigned long long size; + unsigned int type; + } memrange[SYSINFO_MAX_MEM_RANGES]; + + struct cb_cmos_option_table *option_table; + u32 cmos_range_start; + u32 cmos_range_end; + u32 cmos_checksum_location; + + struct cb_framebuffer *framebuffer; + + void *mbtable; /** Pointer to the multiboot table */ + + struct cb_header *header; + struct cb_mainboard *mainboard; +}; + +/* Module exports */ + +/* + * cb_get_sysinfo() looks for the Coreboot tables and if found, populates + * the global cb_sysinfo. It returns 0 on success, non-zero otherwise. + */ +extern struct cb_sysinfo cb_sysinfo; +extern int cb_get_sysinfo(void); + +#endif + diff -urN a/lib/libpayload/coreboot.c b/lib/libpayload/coreboot.c --- a/lib/libpayload/coreboot.c 1969-12-31 17:00:00.000000000 -0700 +++ b/lib/libpayload/coreboot.c 2011-08-21 16:02:19.000000000 -0600 @@ -0,0 +1,227 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2009 coresystems GmbH + * Copyright (C) 2011 Philip Prindeville, Redfish Solutions, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +/* + * Some of this is x86 specific, and the rest of it is generic. Right now, + * since we only support x86, we'll avoid trying to make lots of infrastructure + * we don't need. If in the future, we want to use coreboot on some other + * architecture, then take out the generic parsing code and move it elsewhere. + */ + +/* === Parsing code === */ +/* This is the generic parsing code. */ + +static void cb_parse_memory(void *ptr, struct cb_sysinfo *info) +{ + struct cb_memory *mem = ptr; + int count = MEM_RANGE_COUNT(mem); + int i; + + if (count > SYSINFO_MAX_MEM_RANGES) + count = SYSINFO_MAX_MEM_RANGES; + + info->n_memranges = 0; + + for (i = 0; i < count; i++) { + struct cb_memory_range *range = MEM_RANGE_PTR(mem, i); + + info->memrange[info->n_memranges].base = + cb_unpack64(range->start); + + info->memrange[info->n_memranges].size = + cb_unpack64(range->size); + + info->memrange[info->n_memranges].type = range->type; + + info->n_memranges++; + } +} + +static void cb_parse_serial(void *ptr, struct cb_sysinfo *info) +{ + struct cb_serial *ser = ptr; + info->ser_ioport = ser->ioport; +} + +static void cb_parse_optiontable(void *ptr, struct cb_sysinfo *info) +{ + info->option_table = ptr; +} + +static void cb_parse_checksum(void *ptr, struct cb_sysinfo *info) +{ + struct cb_cmos_checksum *cmos_cksum = ptr; + info->cmos_range_start = cmos_cksum->range_start; + info->cmos_range_end = cmos_cksum->range_end; + info->cmos_checksum_location = cmos_cksum->location; +} + +static void cb_parse_framebuffer(void *ptr, struct cb_sysinfo *info) +{ + info->framebuffer = ptr; +} + +int cb_parse_header(void *addr, void *end, struct cb_sysinfo *info) +{ + struct cb_header *header; + unsigned char *ptr = addr; + void *forward; + int i; + + for (i = 0; (void *)ptr < end; i += 16, ptr += 16) { + header = (struct cb_header *)ptr; + if (!strncmp((const char *)header->signature, "LBIO", 4)) + break; + } + + /* We walked the entire space and didn't find anything. */ + if ((void *)ptr >= end) + return -1; + + printk(KERN_DEBUG "coreboot: signature %.4s at %p\n", + header->signature, header); + + if (!header->table_bytes) + return 0; + + /* Make sure the checksums match. */ + if (cb_checksum(header, sizeof(*header)) != 0) + return -1; + + printk(KERN_DEBUG "coreboot: header checksum verified\n"); + + printk(KERN_DEBUG "coreboot: table checksum got %04x wanted %04x\n", + cb_checksum((caddr_t) header + sizeof(*header), header->table_bytes), + header->table_checksum); + + if (cb_checksum((caddr_t) header + sizeof(*header), + header->table_bytes) != header->table_checksum) + return -1; + + printk(KERN_DEBUG "coreboot: table checksum verified\n"); + + info->header = header; + + /* Now, walk the tables. */ + ptr += header->header_bytes; + + printk(KERN_DEBUG "coreboot: table start %p\n", ptr); + + for (i = 0; i < header->table_entries; i++) { + struct cb_record *rec = (struct cb_record *)ptr; + + printk(KERN_DEBUG "coreboot: entry[%u] @ %p type %04x\n", + i, rec, rec->tag); + + /* We only care about a few tags here (maybe more later). */ + switch (rec->tag) { + case CB_TAG_FORWARD: + forward = (void *)((uintptr_t)((struct cb_forward *)rec)->forward); + printk(KERN_DEBUG "coreboot: forward to %p\n", + forward); + + /* + * On an x86 (PC) platform, 640K-1M is likely unmapped. + * We need to map this back. + */ + if (phys_to_virt((phys_addr_t) forward) >= high_memory) + addr = ioremap((phys_addr_t) cb_page_base(forward), 0x1000) + + cb_page_offset(forward); + else + addr = phys_to_virt((phys_addr_t) forward); + /* we will leave the pages mapped */ + return cb_parse_header(addr, addr + 0x1000, info); + + continue; + case CB_TAG_MEMORY: + cb_parse_memory(ptr, info); + break; + case CB_TAG_SERIAL: + cb_parse_serial(ptr, info); + break; + case CB_TAG_CMOS_OPTION_TABLE: + cb_parse_optiontable(ptr, info); + break; + case CB_TAG_OPTION_CHECKSUM: + cb_parse_checksum(ptr, info); + break; + /* + * FIXME: we should warn on serial if coreboot set up a + * framebuffer buf the payload does not know about it. + */ + case CB_TAG_FRAMEBUFFER: + cb_parse_framebuffer(ptr, info); + break; + case CB_TAG_MAINBOARD: + info->mainboard = (struct cb_mainboard *)ptr; + break; + case CB_TAG_VERSION: + case CB_TAG_EXTRA_VERSION: + case CB_TAG_BUILD: + case CB_TAG_COMPILE_TIME: + case CB_TAG_COMPILE_BY: + case CB_TAG_COMPILE_HOST: + case CB_TAG_COMPILE_DOMAIN: + case CB_TAG_COMPILER: + case CB_TAG_LINKER: + case CB_TAG_ASSEMBLER: + printk(KERN_DEBUG "cb_parse_string: [%04x] %s\n", + rec->tag, ((struct cb_string *)rec)->string); + break; + } + + ptr += rec->size; + + if ((void *)ptr >= end) + return -1; + } + + printk(KERN_DEBUG "coreboot: success (%u entries)!\n", + header->table_entries); + + return 1; +} + diff -urN a/lib/libpayload/coreboot_x86.c b/lib/libpayload/coreboot_x86.c --- a/lib/libpayload/coreboot_x86.c 1969-12-31 17:00:00.000000000 -0700 +++ b/lib/libpayload/coreboot_x86.c 2011-08-21 02:57:47.000000000 -0600 @@ -0,0 +1,60 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2009 coresystems GmbH + * Copyright (C) 2011 Philip Prindeville, Redfish Solutions, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +/* == Architecture specific == */ +/* This is the x86 specific stuff. */ + +int cb_get_coreboot_tables(struct cb_sysinfo *info) +{ + int ret; + void *base = phys_to_virt(0x00000000); + + ret = cb_parse_header(base, base + 0x1000, info); + if (ret != 1) { + base = phys_to_virt(0x000f0000); + ret = cb_parse_header(base, base + 0x1000, info); + } + + return (ret == 1) ? 0 : -1; +} diff -urN a/lib/libpayload/Kconfig b/lib/libpayload/Kconfig --- a/lib/libpayload/Kconfig 1969-12-31 17:00:00.000000000 -0700 +++ b/lib/libpayload/Kconfig 2011-08-21 17:57:04.000000000 -0600 @@ -0,0 +1,7 @@ +config LIBPAYLOAD + bool "Libpayload support" + depends on X86 + help + Libpayload support for locating coreboot tables. + + See: http://www.coreboot.org/Libpayload for more details. diff -urN a/lib/libpayload/Makefile b/lib/libpayload/Makefile --- a/lib/libpayload/Makefile 1969-12-31 17:00:00.000000000 -0700 +++ b/lib/libpayload/Makefile 2011-08-17 23:55:18.000000000 -0600 @@ -0,0 +1 @@ +obj-$(CONFIG_LIBPAYLOAD) += coreboot.o sysinfo.o coreboot_x86.o diff -urN a/lib/libpayload/sysinfo.c b/lib/libpayload/sysinfo.c --- a/lib/libpayload/sysinfo.c 1969-12-31 17:00:00.000000000 -0700 +++ b/lib/libpayload/sysinfo.c 2011-08-21 03:04:47.000000000 -0600 @@ -0,0 +1,75 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * Copyright (C) 2011 Philip Prindeville, Redfish Solutions, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include +#include +#include + +#include +#include + +#include +#include + +/** + * This is a global structure that is used through the library - we set it + * up initially with some dummy values - hopefully they will be overridden. + */ +struct cb_sysinfo cb_sysinfo = { + .ser_ioport = 0x3f8, +}; +EXPORT_SYMBOL(cb_sysinfo); + +int cb_get_sysinfo(void) +{ + int ret; + + /* Get information from the coreboot tables, + * if they exist */ + + ret = cb_get_coreboot_tables(&cb_sysinfo); + + if (!cb_sysinfo.n_memranges) { + /* If we can't get a good memory range, use the default. */ + cb_sysinfo.n_memranges = 2; + + cb_sysinfo.memrange[0].base = 0; + cb_sysinfo.memrange[0].size = 640 * 1024; + cb_sysinfo.memrange[0].type = CB_MEM_RAM; + + cb_sysinfo.memrange[1].base = 1024 * 1024; + cb_sysinfo.memrange[1].size = 31 * 1024 * 1024; + cb_sysinfo.memrange[1].type = CB_MEM_RAM; + } + + return ret; +} +EXPORT_SYMBOL(cb_get_sysinfo);