I just clone the latest coreboot source code from GIT and FSP from Intel FSP website.

Using " make crossgcc-i386 CPU=4 " to setup the compilation environment.

But the Camelback Mountain board could not bring up successfully, 

it always hang with POST CODE = 0xCE.

From the Intel FSP spec 1.0, it seems that system halt before loading FSP.

Attached is my .config file, is there anyone hit the fail symptoms same as me and any idea to solve it?

Thanks a lot,

Jim