coreboot-4.0-r6198M Sat Dec 18 14:00:47 EET 2010 starting... Loading image. Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000 Stage: done loading. Jumping to image. coreboot-4.0-r6198M Sat Dec 18 14:00:47 EET 2010 booting... clocks_per_usec: 402 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:07.0: enabled 1 PNP: 03f0.0: enabled 1 PNP: 03f0.1: enabled 1 PNP: 03f0.2: enabled 1 PNP: 03f0.3: enabled 1 PNP: 03f0.5: enabled 1 PNP: 03f0.7: enabled 1 PNP: 03f0.8: enabled 1 PNP: 03f0.9: enabled 1 PNP: 03f0.a: enabled 1 PCI: 00:07.1: enabled 1 PCI: 00:07.2: enabled 1 PCI: 00:07.3: enabled 1 Compare with tree... Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:07.0: enabled 1 PNP: 03f0.0: enabled 1 PNP: 03f0.1: enabled 1 PNP: 03f0.2: enabled 1 PNP: 03f0.3: enabled 1 PNP: 03f0.5: enabled 1 PNP: 03f0.7: enabled 1 PNP: 03f0.8: enabled 1 PNP: 03f0.9: enabled 1 PNP: 03f0.a: enabled 1 PCI: 00:07.1: enabled 1 PCI: 00:07.2: enabled 1 PCI: 00:07.3: enabled 1 scan_static_bus for Root Device APIC_CLUSTER: 0 enabled Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/7190] ops PCI: 00:00.0 [8086/7190] enabled PCI: 00:01.0 [8086/7191] enabled PCI: 00:07.0 [8086/7110] bus ops PCI: 00:07.0 [8086/7110] enabled PCI: 00:07.1 [8086/7111] ops PCI: 00:07.1 [8086/7111] enabled PCI: 00:07.2 [8086/7112] ops PCI: 00:07.2 [8086/7112] enabled PCI: 00:07.3 [8086/7113] bus ops pwrmgt_enable: gpo default missing in devicetree.cb! PCI: 00:07.3 [8086/7113] enabled PCI: 00:0e.0 [1106/3038] enabled PCI: 00:0e.1 [1106/3038] enabled PCI: 00:10.0 [1106/3249] enabled do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1002/5246] enabled PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:07.0 PNP: 03f0.0 enabled PNP: 03f0.1 enabled PNP: 03f0.2 enabled PNP: 03f0.3 enabled PNP: 03f0.5 enabled PNP: 03f0.7 enabled PNP: 03f0.8 enabled PNP: 03f0.9 enabled PNP: 03f0.a enabled PNP: 03f0.6 enabled scan_static_bus for PCI: 00:07.0 done scan_static_bus for PCI: 00:07.3 scan_static_bus for PCI: 00:07.3 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Setting up VGA for PCI: 01:00.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:07.0 read_resources bus 0 link: 0 PNP: 03f0.8 missing read_resources PNP: 03f0.9 missing read_resources PCI: 00:07.0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 PCI: 00:01.0 child on link 0 PCI: 01:00.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 18 PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 PCI: 00:07.0 child on link 0 PNP: 03f0.0 PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1 PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2 PNP: 03f0.0 PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 03f0.1 PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 03f0.1 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 03f0.2 PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 03f0.3 PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 03f0.5 PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 03f0.7 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.8 PNP: 03f0.9 PNP: 03f0.a PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.6 PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:07.1 PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:07.2 PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:07.3 PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1 PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2 PCI: 00:0e.0 PCI: 00:0e.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:0e.1 PCI: 00:0e.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:10.0 PCI: 00:10.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 10 PCI: 00:10.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 14 PCI: 00:10.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 18 PCI: 00:10.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 1c PCI: 00:10.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:10.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 24 PCI: 00:10.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 01:00.0 14 * [0x0 - 0xff] io PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:01.0 1c * [0x0 - 0xfff] io PCI: 00:10.0 24 * [0x1000 - 0x10ff] io PCI: 00:07.2 20 * [0x1400 - 0x141f] io PCI: 00:0e.0 20 * [0x1420 - 0x143f] io PCI: 00:0e.1 20 * [0x1440 - 0x145f] io PCI: 00:10.0 20 * [0x1460 - 0x147f] io PCI: 00:07.1 20 * [0x1480 - 0x148f] io PCI: 00:10.0 10 * [0x1490 - 0x149f] io PCI: 00:10.0 14 * [0x14a0 - 0x14af] io PCI: 00:10.0 18 * [0x14b0 - 0x14bf] io PCI: 00:10.0 1c * [0x14c0 - 0x14cf] io PCI_DOMAIN: 0000 compute_resources_io: base: 14d0 size: 14d0 align: 12 gran: 0 limit: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 10 * [0x0 - 0x3ffffff] prefmem PCI: 00:01.0 compute_resources_prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem PCI: 01:00.0 18 * [0x20000 - 0x23fff] mem PCI: 00:01.0 compute_resources_mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem PCI: 00:01.0 24 * [0x10000000 - 0x13ffffff] prefmem PCI: 00:01.0 20 * [0x14000000 - 0x140fffff] mem PCI: 00:10.0 30 * [0x14100000 - 0x1410ffff] mem PCI_DOMAIN: 0000 compute_resources_mem: base: 14110000 size: 14110000 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:00.0 constrain_resources: PCI: 00:07.0 constrain_resources: PNP: 03f0.0 constrain_resources: PNP: 03f0.1 constrain_resources: PNP: 03f0.2 constrain_resources: PNP: 03f0.3 constrain_resources: PNP: 03f0.5 constrain_resources: PNP: 03f0.7 constrain_resources: PNP: 03f0.8 constrain_resources: PNP: 03f0.9 constrain_resources: PNP: 03f0.a constrain_resources: PNP: 03f0.6 constrain_resources: PCI: 00:07.1 constrain_resources: PCI: 00:07.2 constrain_resources: PCI: 00:07.3 constrain_resources: PCI: 00:0e.0 constrain_resources: PCI: 00:0e.1 constrain_resources: PCI: 00:10.0 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff <09>lim->base 00001000 lim->limit 0000e3ff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff <09>lim->base 00000000 lim->limit ff7fffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:14d0 align:12 gran:0 limit:e3ff Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:10.0 24 * [0x2000 - 0x20ff] io Assigned: PCI: 00:07.2 20 * [0x2400 - 0x241f] io Assigned: PCI: 00:0e.0 20 * [0x2420 - 0x243f] io Assigned: PCI: 00:0e.1 20 * [0x2440 - 0x245f] io Assigned: PCI: 00:10.0 20 * [0x2460 - 0x247f] io Assigned: PCI: 00:07.1 20 * [0x2480 - 0x248f] io Assigned: PCI: 00:10.0 10 * [0x2490 - 0x249f] io Assigned: PCI: 00:10.0 14 * [0x24a0 - 0x24af] io Assigned: PCI: 00:10.0 18 * [0x24b0 - 0x24bf] io Assigned: PCI: 00:10.0 1c * [0x24c0 - 0x24cf] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 24d0 size: 14d0 align: 12 gran: 0 done PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:e3ff Assigned: PCI: 01:00.0 14 * [0x1000 - 0x10ff] io PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:14110000 align:28 gran:0 limit:ff7fffff Assigned: PCI: 00:00.0 10 * [0xe0000000 - 0xefffffff] prefmem Assigned: PCI: 00:01.0 24 * [0xf0000000 - 0xf3ffffff] prefmem Assigned: PCI: 00:01.0 20 * [0xf4000000 - 0xf40fffff] mem Assigned: PCI: 00:10.0 30 * [0xf4100000 - 0xf410ffff] mem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f4110000 size: 14110000 align: 28 gran: 0 done PCI: 00:01.0 allocate_resources_prefmem: base:f0000000 size:4000000 align:26 gran:20 limit:ff7fffff Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf3ffffff] prefmem PCI: 00:01.0 allocate_resources_prefmem: next_base: f4000000 size: 4000000 align: 26 gran: 20 done PCI: 00:01.0 allocate_resources_mem: base:f4000000 size:100000 align:20 gran:20 limit:ff7fffff Assigned: PCI: 01:00.0 30 * [0xf4000000 - 0xf401ffff] mem Assigned: PCI: 01:00.0 18 * [0xf4020000 - 0xf4023fff] mem PCI: 00:01.0 allocate_resources_mem: next_base: f4024000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 Setting RAM size to 512 MB PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00f4000000 - 0x00f40fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a prefmem PCI: 01:00.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:00.0 18 <- [0x00f4020000 - 0x00f4023fff] size 0x00004000 gran 0x0e mem PCI: 01:00.0 30 <- [0x00f4000000 - 0x00f401ffff] size 0x00020000 gran 0x11 romem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 00:07.0 assign_resources, bus 0 link: 0 PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq PNP: 03f0.1 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned ERROR: PNP: 03f0.a 70 irq size: 0x0000000001 not assigned ERROR: PNP: 03f0.6 60 io size: 0x0000000008 not assigned ERROR: PNP: 03f0.6 70 irq size: 0x0000000001 not assigned PCI: 00:07.0 assign_resources, bus 0 link: 0 PCI: 00:07.1 20 <- [0x0000002480 - 0x000000248f] size 0x00000010 gran 0x04 io PCI: 00:07.2 20 <- [0x0000002400 - 0x000000241f] size 0x00000020 gran 0x05 io PCI: 00:0e.0 20 <- [0x0000002420 - 0x000000243f] size 0x00000020 gran 0x05 io PCI: 00:0e.1 20 <- [0x0000002440 - 0x000000245f] size 0x00000020 gran 0x05 io PCI: 00:10.0 10 <- [0x0000002490 - 0x000000249f] size 0x00000010 gran 0x04 io PCI: 00:10.0 14 <- [0x00000024a0 - 0x00000024af] size 0x00000010 gran 0x04 io PCI: 00:10.0 18 <- [0x00000024b0 - 0x00000024bf] size 0x00000010 gran 0x04 io PCI: 00:10.0 1c <- [0x00000024c0 - 0x00000024cf] size 0x00000010 gran 0x04 io PCI: 00:10.0 20 <- [0x0000002460 - 0x000000247f] size 0x00000020 gran 0x05 io PCI: 00:10.0 24 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 00:10.0 30 <- [0x00f4100000 - 0x00f410ffff] size 0x00010000 gran 0x10 romem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 1000 size 14d0 align 12 gran 0 limit e3ff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base e0000000 size 14110000 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a PCI_DOMAIN: 0000 resource base c0000 size 1ff40000 align 0 gran 0 limit 0 flags e0004200 index b PCI: 00:00.0 PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 10 PCI: 00:01.0 child on link 0 PCI: 01:00.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit e3ff flags 60080102 index 1c PCI: 00:01.0 resource base f0000000 size 4000000 align 26 gran 20 limit ff7fffff flags 60081202 index 24 PCI: 00:01.0 resource base f4000000 size 100000 align 20 gran 20 limit ff7fffff flags 60080202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base f0000000 size 4000000 align 26 gran 26 limit ff7fffff flags 60001200 index 10 PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit e3ff flags 60000100 index 14 PCI: 01:00.0 resource base f4020000 size 4000 align 14 gran 14 limit ff7fffff flags 60000200 index 18 PCI: 01:00.0 resource base f4000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30 PCI: 00:07.0 child on link 0 PNP: 03f0.0 PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1 PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2 PNP: 03f0.0 PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 PNP: 03f0.1 PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 03f0.1 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 index 74 PNP: 03f0.2 PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 03f0.3 PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 03f0.5 PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 PNP: 03f0.7 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.8 PNP: 03f0.9 PNP: 03f0.a PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.6 PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:07.1 PCI: 00:07.1 resource base 2480 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20 PCI: 00:07.2 PCI: 00:07.2 resource base 2400 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20 PCI: 00:07.3 PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1 PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2 PCI: 00:0e.0 PCI: 00:0e.0 resource base 2420 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20 PCI: 00:0e.1 PCI: 00:0e.1 resource base 2440 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20 PCI: 00:10.0 PCI: 00:10.0 resource base 2490 size 10 align 4 gran 4 limit e3ff flags 60000100 index 10 PCI: 00:10.0 resource base 24a0 size 10 align 4 gran 4 limit e3ff flags 60000100 index 14 PCI: 00:10.0 resource base 24b0 size 10 align 4 gran 4 limit e3ff flags 60000100 index 18 PCI: 00:10.0 resource base 24c0 size 10 align 4 gran 4 limit e3ff flags 60000100 index 1c PCI: 00:10.0 resource base 2460 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20 PCI: 00:10.0 resource base 2000 size 100 align 8 gran 8 limit e3ff flags 60000100 index 24 PCI: 00:10.0 resource base f4100000 size 10000 align 16 gran 16 limit ff7fffff flags 60002200 index 30 Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 008b PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 cmd <- 07 PCI: 00:07.1 cmd <- 01 PCI: 00:07.2 cmd <- 01 PCI: 00:07.3 cmd <- 01 PCI: 00:0e.0 cmd <- 01 PCI: 00:0e.1 cmd <- 01 PCI: 00:10.0 cmd <- 03 PCI: 01:00.0 cmd <- 83 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor Intel device 652 CPU: family 06, model 05, stepping 02 Enabling cache Setting fixed MTRRs(0-88) Type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xf Zero-sized MTRR range @0KB DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode_info: sig = 0x00000652 pf=0x00000001 rev = 0x00000000 microcode updated to revision: 0000002a from revision 00000000 Disabling local apic...done. CPU #0 initialized PCI: 00:00.0 init Northbridge Init PCI: 00:07.0 init RTC Init PCI: 00:07.1 init IDE: Primary IDE interface: on IDE: Secondary IDE interface: on IDE: Access to legacy IDE ports: on IDE: Primary IDE interface, drive 0: UDMA/33: off IDE: Primary IDE interface, drive 1: UDMA/33: off IDE: Secondary IDE interface, drive 0: UDMA/33: off IDE: Secondary IDE interface, drive 1: UDMA/33: off PCI: 00:07.2 init PCI: 00:0e.0 init Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram CBFS: follow chain: fffc2ec0 + 38 + 142ec + align -> fffd7200 Check fallback/payload CBFS: follow chain: fffd7200 + 38 + ea2c + align -> fffe5c80 Check CBFS: follow chain: fffe5c80 + 28 + 19ff6 + align -> fffffcc0 CBFS: Could not find file pci1106,3038.rom PCI: 00:0e.1 init Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram CBFS: follow chain: fffc2ec0 + 38 + 142ec + align -> fffd7200 Check fallback/payload CBFS: follow chain: fffd7200 + 38 + ea2c + align -> fffe5c80 Check CBFS: follow chain: fffe5c80 + 28 + 19ff6 + align -> fffffcc0 CBFS: Could not find file pci1106,3038.rom PCI: 00:10.0 init Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram CBFS: follow chain: fffc2ec0 + 38 + 142ec + align -> fffd7200 Check fallback/payload CBFS: follow chain: fffd7200 + 38 + ea2c + align -> fffe5c80 Check CBFS: follow chain: fffe5c80 + 28 + 19ff6 + align -> fffffcc0 CBFS: Could not find file pci1106,3249.rom On card, ROM address for PCI: 00:10.0 = f4100000 PCI expansion ROM, signature 0xffff, INIT size 0x1fe00, data ptr 0xffff Incorrect expansion ROM header signature ffff PCI: 01:00.0 init Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram CBFS: follow chain: fffc2ec0 + 38 + 142ec + align -> fffd7200 Check fallback/payload CBFS: follow chain: fffd7200 + 38 + ea2c + align -> fffe5c80 Check CBFS: follow chain: fffe5c80 + 28 + 19ff6 + align -> fffffcc0 CBFS: Could not find file pci1002,5246.rom On card, ROM address for PCI: 01:00.0 = f4000000 PCI expansion ROM, signature 0xaa55, INIT size 0xb000, data ptr 0x0158 PCI ROM image, vendor ID 1002, device ID 5246, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from f4000000 to 0xc0000, 0xb000 bytes Real mode stub @00000600: 606 bytes Calling Option ROM... Unsupported software interrupt #0x42 eax 0x7 int42 call returned error. ... Option ROM returned. PNP: 03f0.0 init PNP: 03f0.1 init PNP: 03f0.2 init PNP: 03f0.3 init PNP: 03f0.5 init Keyboard init... Keyboard controller output buffer result timeout Timeout waiting for keyboard after reset. PNP: 03f0.7 init PNP: 03f0.a init PNP: 03f0.6 init Devices initialized Show all devs...After init. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:07.0: enabled 1 PNP: 03f0.0: enabled 1 PNP: 03f0.1: enabled 1 PNP: 03f0.2: enabled 1 PNP: 03f0.3: enabled 1 PNP: 03f0.5: enabled 1 PNP: 03f0.7: enabled 1 PNP: 03f0.8: enabled 1 PNP: 03f0.9: enabled 1 PNP: 03f0.a: enabled 1 PCI: 00:07.1: enabled 1 PCI: 00:07.2: enabled 1 PCI: 00:07.3: enabled 1 PCI: 00:0e.0: enabled 1 PCI: 00:0e.1: enabled 1 PCI: 00:10.0: enabled 1 PCI: 01:00.0: enabled 1 PNP: 03f0.6: enabled 1 CPU: 00: enabled 1 Initializing CBMEM area to 0x1fff0000 (65536 bytes) Adding CBMEM entry as no. 1 Moving GDT to 1fff0200...ok High Tables Base is 1fff0000. Copying Interrupt Routing Table to 0x000f0000... done. Verifying copy of Interrupt Routing Table at 0x000f0000... done Checking Interrupt Routing Table consistency... Inconsistent Interrupt Routing Table size (0x90/0x80). check_pirq_routing_table(): Interrupt Routing Table located at 000f0000. Interrupt Routing Table checksum is: 0x17 but should be: 0x6a. done. Adding CBMEM entry as no. 2 Copying Interrupt Routing Table to 0x1fff0400... done. Verifying copy of Interrupt Routing Table at 0x1fff0400... done Checking Interrupt Routing Table consistency... Inconsistent Interrupt Routing Table size (0x90/0x80). check_pirq_routing_table(): Interrupt Routing Table located at 1fff0400. Interrupt Routing Table checksum is: 0x17 but should be: 0x83. done. PIRQ table: 128 bytes. Adding CBMEM entry as no. 3 Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum cbdf New low_table_end: 0x00000518 Now going to write high coreboot table at 0x1fff1400 rom_table_end = 0x1fff1400 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0x1fff1400 to 0x20000000 Adding high table area coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000001ffeffff: RAM 3. 000000001fff0000-000000001fffffff: CONFIGURATION TABLES 4. 00000000ff800000-00000000ffffffff: RESERVED Wrote coreboot table at: 1fff1400 - 1fff15ac checksum 4872 coreboot table: 428 bytes. Multiboot Information structure has been written. 0. FREE SPACE 1fff3400 0000cc00 1. GDT 1fff0200 00000200 2. IRQ TABLE 1fff0400 00001000 3. COREBOOT 1fff1400 00002000 Check CBFS header at fffffc9e magic is 4f524243 Found CBFS header at fffffc9e Check fallback/romstage CBFS: follow chain: fffc0000 + 38 + 2e55 + align -> fffc2ec0 Check fallback/coreboot_ram CBFS: follow chain: fffc2ec0 + 38 + 142ec + align -> fffd7200 Check fallback/payload Got a payload Loading segment from rom address 0xfffd7238 parameter section (skipped) Loading segment from rom address 0xfffd7254 data (compression=1) New segment dstaddr 0x100000 memsize 0x172e70 srcaddr 0xfffd72d8 filesize 0xe95f (cleaned up) New segment addr 0x100000 size 0x172e70 offset 0xfffd72d8 filesize 0xe95f Loading segment from rom address 0xfffd7270 data (compression=1) New segment dstaddr 0x272e70 memsize 0x48 srcaddr 0xfffe5c37 filesize 0x2d (cleaned up) New segment addr 0x272e70 size 0x48 offset 0xfffe5c37 filesize 0x2d Loading segment from rom address 0xfffd728c Entry Point 0x00100000 Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000172e70 filesz: 0x000000000000e95f lb: [0x0000000000100000, 0x0000000000134000) segment: [0x0000000000100000, 0x000000000010e95f, 0x0000000000272e70) bounce: [0x000000001fe49190, 0x000000001fe57aef, 0x000000001ffbc000) Post relocation: addr: 0x000000001fe49190 memsz: 0x0000000000172e70 filesz: 0x000000000000e95f using LZMA [ 0x1fe49190, 1fe6b8d0, 0x1ffbc000) <- fffd72d8 Clearing Segment: addr: 0x000000001fe6b8d0 memsz: 0x0000000000150730 dest 1fe49190, end 1ffbc000, bouncebuffer 1fe49190 move suffix around: from 1fe7d190, to 134000, amount: 13ee70 Loading Segment: addr: 0x0000000000272e70 memsz: 0x0000000000000048 filesz: 0x000000000000002d lb: [0x0000000000100000, 0x0000000000134000) Post relocation: addr: 0x0000000000272e70 memsz: 0x0000000000000048 filesz: 0x000000000000002d using LZMA [ 0x00272e70, 00272eb8, 0x00272eb8) <- fffe5c37 dest 00272e70, end 00272eb8, bouncebuffer 1fe49190 Loaded segments Jumping to boot code at 100000 entry = 0x00100000 lb_start = 0x00100000 lb_size = 0x00034000 adjust = 0x1febc000 buffer = 0x1fe49190 elf_boot_notes = 0x00123cd0 adjusted_boot_notes = 0x1ffdfcd0 FILO version 0.6.0 (ts@ts-laptop) Sat Dec 18 13:56:18 EET 2010 00:07.2 7112:8086.2 UHCI controller 00:0e.1 3038:1106.1 UHCI controller 00:0e.0 3038:1106.0 UHCI controller fullspeed device device 0x1005:0xb113 is USB 2.0 (MSC) it uses SCSI transparent command set it uses Bulk-Only Transport protocol using endpoint 82 as in, 1 as out has 1 luns Waiting for device to become ready... ok. spin up. OK. Reading capacity of mass storage device. has 3948544 blocks sized 512b ERROR: No such CMOS option (boot_devices) menu: uda1:/filo.lst <1b>[H<1b>[J<1b>[m<1b>(B<1b>[1;1H <1b>[2;1H <1b>[3;1H <1b>[4;1H <1b>[5;1H <1b>[6;1H <1b>[7;1H <1b>[8;1H <1b>[9;1H <1b>[10;1H <1b>[11;1H <1b>[12;1H <1b>[13;1H <1b>[14;1H <1b>[15;1H <1b>[16;1H <1b>[17;1H <1b>[18;1H <1b>[19;1H <1b>[20;1H <1b>[21;1H <1b>[22;1H <1b>[23;1H <1b>[24;1H <1b>[25;1H <1b>[1;1HERROR: No such CMOS option (boot_default) <1b>[m<1b>(B<1b>[1;1H<1b>[37;40mFile not found.<1b>[2;1H<1b>[m<1b>(B<1b>[1;1H<1b>[37;40m <1b>[2;1H FILO 0.6.0 <1b>[3;1H <1b>[4;1H <1b>[5;1H <1b>[6;1H <1b>[7;1H <1b>[8;1H <1b>[9;1H <1b>[10;1H <1b>[11;1H <1b>[12;1H <1b>[13;1H <1b>[14;1H <1b>[15;1H <1b>[16;1H <1b>[17;1H <1b>[18;1H <1b>[19;1H <1b>[20;1H <1b>[21;1H <1b>[22;1H <1b>[23;1H <1b>[24;1H <1b>[25;1H <1b>[4;1H<1b>[?25h<1b>[m<1b>(B<1b>[4;2H<1b>(0<1b>[37;40mlqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqk<1b>[5;2Hx<1b>(B <1b>(0x<1b>[6;2Hx<1b>(B <1b>(0x<1b>[7;2Hx<1b>(B <1b>(0x<1b>[8;2Hx<1b>(B <1b>(0x<1b>[9;2Hx<1b>(B <1b>(0x<1b>[10;2Hx<1b>(B <1b>(0x<1b>[11;2Hx<1b>(B <1b>(0x<1b>[12;2Hx<1b>(B <1b>(0x<1b>[13;2Hx<1b>(B <1b>(0x<1b>[14;2Hx<1b>(B <1b>(0x<1b>[15;2Hx<1b>(B <1b>(0x<1b>[16;2Hx<1b>(B <1b>(0x<1b>[17;2Hmqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqj<1b>[18;1H<1b>(B Use the ^ and v keys to select which entry is highlighted.<1b>[19;1H<1b>[m<1b>(B<1b>[19;1H<1b>[37;40m Press enter to boot the selected OS, 'e' to edit the<1b>[20;1H commands before booting, 'a' to modify the kernel arguments<1b>[21;1H before booting, or 'c' for a command-line.<1b>[21;49H<1b>[m<1b>(B<1b>[5;3H<1b>[30;47m tss <1b>(0<1b>[37;40mx<1b>(B <1b>[5;75H<1b>[m<1b>(B<1b>[6;3H<1b>[37;40m <1b>[6;75H<1b>[m<1b>(B<1b>[7;3H<1b>[37;40m <1b>[7;75H<1b>[m<1b>(B<1b>[8;3H<1b>[37;40m <1b>[8;75H<1b>[m<1b>(B<1b>[9;3H<1b>[37;40m <1b>[9;75H<1b>[m<1b>(B<1b>[10;3H<1b>[37;40m <1b>[10;75H<1b>[m<1b>(B<1b>[11;3H<1b>[37;40m <1b>[11;75H<1b>[m<1b>(B<1b>[12;3H<1b>[37;40m <1b>[12;75H<1b>[m<1b>(B<1b>[13;3H<1b>[37;40m <1b>[13;75H<1b>[m<1b>(B<1b>[14;3H<1b>[37;40m <1b>[14;75H<1b>[m<1b>(B<1b>[15;3H<1b>[37;40m <1b>[15;75H<1b>[m<1b>(B<1b>[16;3H<1b>[37;40m <1b>[16;75H<1b>[m<1b>(B<1b>[16;78H<1b>[37;40m <1b>[5;75H