A new post titled "coreboot changelog" has been published on the coreboot blog. Find the full post at http://blogs.coreboot.org/blog/2015/11/05/coreboot-changelog-4/
This changelog covers 2 weeks up to November 1st, during which coreboot-4.2 was released.
In that timeframe, the repository saw 214 commits spanning d98471c..f6dc544.
Before we get to the stuff that the tech media gets excited about, the first thing to report about is a bunch of efforts to improve the reliability of our tree and the automated testing we conduct.
abuild, the utility for automatically building the default configuration of every board in the tree, learned to deal with mainboard directories that cover multiple variants of a board. This brings back build test coverage for google/veyron.
Various programs in the util/ hierarchy of the tree are now automatically tested by our build test infrastructure, and the related code saw some refactoring to make testing more tools really simple. During that development, some Makefiles below util/ were also cleaned up.
Another area of clean ups was the conversion of `#ifdef` statements to using the `IS_ENABLED` macro. This ensures that even unused code paths are syntactically validated before the optimizer drops them, leading to the same binary output with better build test coverage.
In preparation of future improvements, we gained a lint tool for Kconfig files. It will be hooked up to the build system once the tree is clean, until then it provides a way to see what’s still missing. Check out `util/lint/kconfig_lint` if you’re curious.
As a proof of concept, util/fuzz-tests now provides an environment to test the jpeg decoder we ship for splash screens using [afl-fuzz](http://lcamtuf.coredump.cx/afl/). The same approach can be applied to other coreboot components to find potential crash bugs (or worse).
Finally, several chip drivers were removed because they had no user in the tree anymore and thus saw no testing at all. Some of them will likely come back together with new mainboards that use them.
In addition to the code development to improve code quality, `util/scripts/maintainers.go` provides a way to query the MAINTAINERS database that we’re building, as one piece of a larger effort to improve code quality through formal submodule maintainership.
Another formal clean-up was the tree-wide removal of the last paragraph of the GPL license header in files, the one denoting where to obtain the license text. First, we ship it in the tree, second, it’s probably easier to get with a quick search engine request than by writing a letter to a US post address that may or may not be current.
Rockchip’s RK3288 gained support for additional power/clock states and a more robust EDID handling.
The ongoing effort to support booting in long mode (64 bit) on AMD64 progressed by the integration of changes to make SMM handling and AMD chipset drivers 64bit clean.
Some ACPI for older Intel chipsets was consolidated and is now used for multiple chipset generations.
The Intel GMA driver has also seen improvements, allowing brightness levels for laptop panels to be configured per board, and to disable the graphics chip entirely.
In terms of drivers, the aspeed driver provides native VGA text, and there were improvements to superio and i2c chip drivers, supporting more of their features.
Sandybridge now initializes CPUs serially for robustness reasons, and Intel FSP supports loading microcode from coreboot.
cbfstool now extracts stages and rmodules as ELF files, including relocation information for the former, so that roundtrips of add-stage/extract/add-stage become possible. It now also compiles more reliably on Cygwin.
libpayload saw the additional of a graphics library to layout images on a framebuffer using framebuffer independent coordinates, and some bug fixes to its USB drivers.
In addition to all those cleanups and little new features, coreboot also provides support for a couple new boards, in particular two Intel Skylake based boards by Google (google/chell and google/lars) as well as Asus KFSN4-DRE with K8 CPUs and Asus KGPE-D16 with more recent AMD CPUs (Fam10h and Fam15h).
All related chipsets also saw significant improvements, of which the still ongoing effort to provide non-AGESA implementations for the Fam15h CPU, as well as a ton (metric, in case you’re curious) of bugfixes and feature developments (for example Suspend to RAM) for all AMD CPUs starting with K8 is particularly notable.
Besides those changes, and minor (but valuable) contributions to improve the code style, there’s a bucket list of improvements across the entire tree: more robust SMM entry on i945, fixes to our SMBIOS table generation, changes to the resource allocator to become more robust and IOMMU friendly and to measure the time it takes, and improvements to the robustness of our build process.