[coreboot] question on SMM

[ron minnich]

there's something I am certain I don't understand about SMM on intel
chipsets.

The question is pretty simple. Consider a system with a recent intel
chipset and flash. Is there some special secret sauce that disables writing
to flash unless in SMM and if so, what is it?

Thanks to anyone who can point me to chapter and verse of a data sheet.

ron