Re: [coreboot] Patch set updated for coreboot: 08b1466 Add support for A-Open DXPL Plus-U motherboard

[Paul Menzel]

Dear Kyösti Mälkki,

Am Mittwoch, den 19.10.2011, 18:00 +0200 schrieb Kyösti Mälkki:
> Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/303
>
> -gerrit
>
> commit 08b14667047688b52aab01c686c42ea9ac458815
> Author: Kyösti Mälkki 
> Date:   Mon Oct 17 18:08:13 2011 +0300
> Add support for A-Open DXPL Plus-U motherboard

these are great news. Thank you for your work and patches!
> This is an old (pre-2005) entry-level server mainboard.

The manual [1] is available but I could not find a product page.
> The code is adapted from mainboard/intel/xe7501devkit.
>
> Featured chips:
> - Dual socket604
> - E7505 northbridge
> - 82801DB southbridge (with EHCI debug port)
> - 82870p2 PCI-X bridge
> - LPC47M102S-MC super-io
> - 512kB FWH flash (flashrom does the job well)
>
> What works:
>  - Dual-Xeon P4/HT boot with microcode update
>  - RAM: registered ECC DDR266 in dual-channel
>  - PCI-X slot interrupts with ACPI and I/O apic
>  - On-board PCI-X GbE and SCSI
>  - ACPI power-off and wakeup with PME#

What operating system did you test with? What payload did you use? Did
you measure how long every stage takes to boot? Kevin O’Connor wrote a
script `readserial.py` which you can find in the SeaBIOS repository [2].
> Notes :
>  - Current ACPI is more or less a mess
>  - Interrupts do not route correctly with PIRQ
>  - MP-table is not implemented
>  - Issues with reboots remain (cold and warm)
>  - Many superio devices are disabled by default
>  - Audio codec is not investigated
>
> Change-Id: I02d18c83f485a09ada65dde03bcc86e9163f2011
> Signed-off-by: Kyösti Mälkki <[e-mail]>

[…]

Thanks again,

Paul

[1] ftp://ftp.aopen.com/pub/server/motherboard/dxplpu/manual/dxplpu-ol-e.pdf
[2] http://www.coreboot.org/pipermail/coreboot/2010-October/061292.html