Re: [coreboot] r820 - in coreboot-v3: mainboard/amd/serengeti southbridge/amd/amd8111

[ron minnich]

On Mon, Aug 25, 2008 at 5:32 PM, Carl-Daniel Hailfinger
> I looked at the code and there's no miscompilation. Current v3 serengeti
> initram looks like this:
> int main(void)
> {
>        printk(BIOS_DEBUG, "Hi there from stage1\n");
>        post_code(POST_START_OF_MAIN);
>    printk(BIOS_DEBUG, "stage1 returns\n");
>    return 0;
>
> }
>
> So the code is a NOP and gcc figured it out. Perfect.

This is the kind of optimization I keep taking for granted, since this
is how the Plan 9 linker works. Always interesting to see lots of
unused code disappear :-)

ron