believe it or not that code runs on coreboot simulator, hardware, and qemu, and gets a different answer on each.

On Thu, Mar 29, 2018 at 12:54 PM Nico Huber <> wrote:
On 29.03.2018 20:25, ron minnich wrote:
> I have the following code:
> movl $0x12345678, %eax
> movl $0xaaaabbbb, %ebx
> movb $0x10, %cl
> shrdw %ebx, %eax

If I had to assemble it, I would have refuse it... *w with 32-bit
registers? how should that work?

Though, after reading a little about AT&T, I found this:

  "In AT&T syntax, the size of memory operands is determined from
   the last character of the opcode name." [1]

Memory operands, heh, no memory operands here... but the GNU as
manual talks about operands in general and that it may infer the
suffix from register operands, hmmm, no word about what happens
if register operands don't match the suffix.

I've also tried to find a quote about the third operand. Is it
%cl implicitly? I would think so, but is it written anywhere?
Could also be implicitly $0, ok that would never make sense.

> quiz: what's the value of %ax after this instruction?

I guess it depends on the assembler you use. non-zero?

TIL, you can't shift by 32 bits this way.