coreboot-4.13-729-g219caf8358-dirty Sun Dec 27 15:57:09 UTC 2020 bootblock starting (log level: 8)...
FMAP: Found "FLASH" version 1.1 at 0x300000.
FMAP: base = 0x0 size = 0x800000 #areas = 15
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
Info: CBFS @ 342000 size 37d000 ; mem-mapped area @ 1000 size 6be000
Exit bios_mmap_init (src/soc/intel/apollolake/mmap_boot.c)
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
CBFS: mcache @0xfef04e00 built for 14 files, used 0x2fc of 0x2000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0xa924 in mcache @0xfef04e38
BS: bootblock times (exec / console): total (unknown) / 56 ms


coreboot-4.13-729-g219caf8358-dirty Sun Dec 27 15:57:09 UTC 2020 romstage starting (log level: 8)...
CPU: Intel(R) Atom(TM) Processor E3950 @ 1.60GHz
CPU: ID 506c9, Apollolake B0, ucode: 00000038
CPU: AES Supported, TXT Not Supported, VT Supported
MCH: device id 5af0 (rev 0b) is Apollolake
PCH: device id 5ae8 (rev 0b) is Apollolake
IGD: device id 5a84 (rev 0b) is Apollolake HD 505
pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000
gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
prsts: 00000000
tco_sts:   0000 0000
gen_pmcon1: 08004004 gen_pmcon2: 00003a00 gen_pmcon3: 00000000
prev_sleep_state 5
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
Info: CBFS @ 342000 size 37d000 ; mem-mapped area @ 1000 size 6be000
Exit bios_mmap_init (src/soc/intel/apollolake/mmap_boot.c)
CBFS: Found 'fspm.bin' @0x31f40 size 0x59000 in mcache @0xfef04f58
POST: 0x34
FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes)
MRC cache found, size b2c0
bootmode is set to: 2
MAINBOARD: src/mainboard/up/squared/romstage.c/mainboard_memory_init_params called
MAINBOARD: Found memory SKU ID: 0x00
MAINBOARD: Found supported memory: 512MB
FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes)
POST: 0x36
POST: 0x92
POST: 0x98
CBMEM:
IMD: root @ 0x3afff000 254 entries.
IMD: root @ 0x3affec00 62 entries.
External stage cache:
IMD: root @ 0x3b7ff000 254 entries.
IMD: root @ 0x3b7fec00 62 entries.
FMAP: area RW_MRC_CACHE found @ 311000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
SF: Detected 00 0000 with sector size 0x1000, total 0x800000
MRC: 'RW_MRC_CACHE' does not need update.
CPU: frequency set to 2000 MHz
FMAP: area RW_VAR_MRC_CACHE found @ 321000 (4096 bytes)
MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'.
MRC: cache data 'RW_VAR_MRC_CACHE' needs update.
MRC: updated 'RW_VAR_MRC_CACHE'.
1 DIMMs found
SMM Memory Map
SMRAM       : 0x3b000000 0x800000
 Subregion 0: 0x3b000000 0x700000
 Subregion 1: 0x3b700000 0x100000
 Subregion 2: 0x3b800000 0x0
top_of_ram = 0x3b000000
MTRR Range: Start=3a000000 End=3b000000 (Size 1000000)
MTRR Range: Start=3b000000 End=3b800000 (Size 800000)
MTRR Range: Start=ff800000 End=0 (Size 800000)
CBFS: Found 'fallback/postcar' @0xb6580 size 0x4e8c in mcache @0xfef04ff8
Decompressing stage fallback/postcar @ 0x3abf2fc0 (35528 bytes)
Loading module at 0x3abf3000 with entry 0x3abf3000. filesize: 0x4b50 memsize: 0x8a88
Processing 184 relocs. Offset value of 0x38bf3000
BS: romstage times (exec / console): total (unknown) / 260 ms


coreboot-4.13-729-g219caf8358-dirty Sun Dec 27 15:57:09 UTC 2020 postcar starting (log level: 8)...
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
Info: CBFS @ 342000 size 37d000 ; mem-mapped area @ 1000 size 6be000
Exit bios_mmap_init (src/soc/intel/apollolake/mmap_boot.c)
CBFS: Found 'fallback/ramstage' @0x16680 size 0x19eb7 in mcache @0x3abfd0c0
Decompressing stage fallback/ramstage @ 0x3aba5fc0 (311216 bytes)
Loading module at 0x3aba6000 with entry 0x3aba6000. filesize: 0x37998 memsize: 0x4bf70
Processing 3400 relocs. Offset value of 0x39da6000
BS: postcar times (exec / console): total (unknown) / 61 ms


coreboot-4.13-729-g219caf8358-dirty Sun Dec 27 15:57:09 UTC 2020 ramstage starting (log level: 8)...
POST: 0x39
POST: 0x80
Normal boot
POST: 0x70
BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms
POST: 0x71
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
FMAP: area COREBOOT found @ 342000 (3657728 bytes)
Info: CBFS @ 342000 size 37d000 ; mem-mapped area @ 1000 size 6be000
Exit bios_mmap_init (src/soc/intel/apollolake/mmap_boot.c)
CBFS: Found 'fsps.bin' @0x8afc0 size 0x2b000 in mcache @0x3abfd180
Call (platform_fsp_silicon_init_params_cb) src/soc/intel/apollolake/chip.c
Call (parse_devicetree) src/soc/intel/apollolake/chip.c
PCI:00.1: Could not disable the device
PCI:0d.0: Could not disable the device
PCI:0d.1: Could not disable the device
PCI:0d.2: Could not disable the device
PCI:0d.3: Could not disable the device
PCI:1a.0: Could not disable the device
PCI:1f.0: Could not disable the device
MAINBOARD: src/mainboard/up/squared/ramstage.c/mainboard_silicon_init_params called
POST: 0x93
FSPS returned 0
POST: 0x99
ITSS IRQ Polarities Before:
IPC0: 0xffffeef8
IPC1: 0xffffffff
IPC2: 0xffffffff
IPC3: 0x00ffffff
ITSS IRQ Polarities After:
IPC0: 0xffffeef8
IPC1: 0x0003ffff
IPC2: 0x00000000
IPC3: 0x00000000
CPU TDP = 12 Watts
CPU PL1 = 12 Watts
CPU PL2 = 15 Watts
BS: BS_DEV_INIT_CHIPS run times (exec / console): 33 / 109 ms
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
MMIO: fed40000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:0d.0: enabled 0
PCI: 00:0d.1: enabled 0
PCI: 00:0d.2: enabled 0
PCI: 00:0d.3: enabled 0
PCI: 00:0e.0: enabled 0
PCI: 00:0f.0: enabled 1
PCI: 00:11.0: enabled 0
PCI: 00:12.0: enabled 0
PCI: 00:13.0: enabled 0
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 0
PCI: 00:13.3: enabled 0
PCI: 00:14.0: enabled 0
PCI: 00:14.1: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:16.3: enabled 1
PCI: 00:17.0: enabled 1
PCI: 00:17.1: enabled 1
PCI: 00:17.2: enabled 1
PCI: 00:17.3: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:1a.0: enabled 0
PCI: 00:1b.0: enabled 0
PCI: 00:1c.0: enabled 0
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 0
PCI: 00:1f.1: enabled 0
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:00.1: enabled 0
  PCI: 00:00.2: enabled 0
  PCI: 00:02.0: enabled 1
  PCI: 00:03.0: enabled 0
  PCI: 00:0d.0: enabled 0
  PCI: 00:0d.1: enabled 0
  PCI: 00:0d.2: enabled 0
  PCI: 00:0d.3: enabled 0
  PCI: 00:0e.0: enabled 0
  PCI: 00:0f.0: enabled 1
  PCI: 00:11.0: enabled 0
  PCI: 00:12.0: enabled 0
  PCI: 00:13.0: enabled 0
  PCI: 00:13.1: enabled 0
  PCI: 00:13.2: enabled 0
  PCI: 00:13.3: enabled 0
  PCI: 00:14.0: enabled 0
  PCI: 00:14.1: enabled 0
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 1
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 1
  PCI: 00:16.2: enabled 1
  PCI: 00:16.3: enabled 1
  PCI: 00:17.0: enabled 1
  PCI: 00:17.1: enabled 1
  PCI: 00:17.2: enabled 1
  PCI: 00:17.3: enabled 1
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 0
  PCI: 00:19.0: enabled 1
  PCI: 00:19.1: enabled 1
  PCI: 00:19.2: enabled 1
  PCI: 00:1a.0: enabled 0
  PCI: 00:1b.0: enabled 0
  PCI: 00:1c.0: enabled 0
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 0
  PCI: 00:1f.1: enabled 0
 MMIO: fed40000: enabled 1
Root Device scanning...
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
MMIO: fed40000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0000] ops
PCI: 00:00.0 [8086/5af0] enabled
PCI: 00:02.0 [8086/0000] bus ops
PCI: 00:02.0 [8086/5a84] enabled
PCI: 00:0d.0 [8086/0000] ops
PCI: 00:0d.0 [8086/5a92] disabled
PCI: 00:0d.1 [8086/0000] bus ops
PCI: 00:0d.1 [8086/5a94] disabled
PCI: 00:0d.2 [8086/0000] bus ops
PCI: 00:0d.2 [8086/5a96] disabled
PCI: 00:0d.3 [8086/0000] ops
PCI: 00:0d.3 [8086/5aec] disabled
PCI: 00:0f.0 [8086/0000] ops
PCI: 00:0f.0 [8086/5a9a] enabled
PCI: 00:0f.1 [8086/5a9c] enabled
PCI: 00:0f.2 [8086/5a9e] enabled
PCI: 00:15.0 [8086/0000] bus ops
PCI: 00:15.0 [8086/5aa8] enabled
PCI: 00:15.1 [8086/0000] ops
PCI: 00:15.1 [8086/5aaa] enabled
PCI: 00:16.0 [8086/0000] bus ops
PCI: 00:16.0 [8086/5aac] enabled
PCI: 00:16.1 [8086/0000] bus ops
PCI: 00:16.1 [8086/5aae] enabled
PCI: 00:16.2 [8086/0000] bus ops
PCI: 00:16.2 [8086/5ab0] enabled
PCI: 00:16.3 [8086/0000] bus ops
PCI: 00:16.3 [8086/5ab2] enabled
PCI: 00:17.0 [8086/0000] bus ops
PCI: 00:17.0 [8086/5ab4] enabled
PCI: 00:17.1 [8086/0000] bus ops
PCI: 00:17.1 [8086/5ab6] enabled
PCI: 00:17.2 [8086/0000] bus ops
PCI: 00:17.2 [8086/5ab8] enabled
PCI: 00:17.3 [8086/0000] bus ops
PCI: 00:17.3 [8086/5aba] enabled
PCI: 00:18.0 [8086/0000] ops
PCI: 00:18.0 [8086/5abc] enabled
PCI: 00:18.1 [8086/0000] ops
PCI: 00:18.1 [8086/5abe] enabled
PCI: 00:18.2 [8086/0000] ops
PCI: 00:18.2 [8086/5ac0] enabled
PCI: 00:19.0 [8086/0000] bus ops
PCI: 00:19.0 [8086/5ac2] enabled
PCI: 00:19.1 [8086/0000] bus ops
PCI: 00:19.1 [8086/5ac4] enabled
PCI: 00:19.2 [8086/0000] bus ops
PCI: 00:19.2 [8086/5ac6] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/5ae8] disabled
PCI: 00:1f.1 [8086/0000] bus ops
PCI: 00:1f.1 [8086/5ad4] disabled
POST: 0x25
PCI: Leftover static devices:
PCI: 00:00.1
PCI: 00:00.2
PCI: 00:03.0
PCI: 00:0e.0
PCI: 00:11.0
PCI: 00:12.0
PCI: 00:13.0
PCI: 00:13.1
PCI: 00:13.2
PCI: 00:13.3
PCI: 00:14.0
PCI: 00:14.1
PCI: 00:18.3
PCI: 00:1a.0
PCI: 00:1b.0
PCI: 00:1c.0
PCI: 00:1e.0
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
scan_generic_bus for PCI: 00:02.0
scan_generic_bus for PCI: 00:02.0 done
scan_bus: bus PCI: 00:02.0 finished in 7 msecs
PCI: 00:15.0 scanning...
scan_static_bus for PCI: 00:15.0
scan_static_bus for PCI: 00:15.0 done
scan_bus: bus PCI: 00:15.0 finished in 7 msecs
PCI: 00:16.0 scanning...
scan_static_bus for PCI: 00:16.0
scan_static_bus for PCI: 00:16.0 done
scan_bus: bus PCI: 00:16.0 finished in 7 msecs
PCI: 00:16.1 scanning...
scan_static_bus for PCI: 00:16.1
scan_static_bus for PCI: 00:16.1 done
scan_bus: bus PCI: 00:16.1 finished in 7 msecs
PCI: 00:16.2 scanning...
scan_static_bus for PCI: 00:16.2
scan_static_bus for PCI: 00:16.2 done
scan_bus: bus PCI: 00:16.2 finished in 7 msecs
PCI: 00:16.3 scanning...
scan_static_bus for PCI: 00:16.3
scan_static_bus for PCI: 00:16.3 done
scan_bus: bus PCI: 00:16.3 finished in 7 msecs
PCI: 00:17.0 scanning...
scan_static_bus for PCI: 00:17.0
scan_static_bus for PCI: 00:17.0 done
scan_bus: bus PCI: 00:17.0 finished in 7 msecs
PCI: 00:17.1 scanning...
scan_static_bus for PCI: 00:17.1
scan_static_bus for PCI: 00:17.1 done
scan_bus: bus PCI: 00:17.1 finished in 7 msecs
PCI: 00:17.2 scanning...
scan_static_bus for PCI: 00:17.2
scan_static_bus for PCI: 00:17.2 done
scan_bus: bus PCI: 00:17.2 finished in 7 msecs
PCI: 00:17.3 scanning...
scan_static_bus for PCI: 00:17.3
scan_static_bus for PCI: 00:17.3 done
scan_bus: bus PCI: 00:17.3 finished in 7 msecs
PCI: 00:19.0 scanning...
scan_generic_bus for PCI: 00:19.0
scan_generic_bus for PCI: 00:19.0 done
scan_bus: bus PCI: 00:19.0 finished in 7 msecs
PCI: 00:19.1 scanning...
scan_generic_bus for PCI: 00:19.1
scan_generic_bus for PCI: 00:19.1 done
scan_bus: bus PCI: 00:19.1 finished in 7 msecs
PCI: 00:19.2 scanning...
scan_generic_bus for PCI: 00:19.2
scan_generic_bus for PCI: 00:19.2 done
scan_bus: bus PCI: 00:19.2 finished in 7 msecs
POST: 0x55
scan_bus: bus DOMAIN: 0000 finished in 393 msecs
scan_static_bus for Root Device done
scan_bus: bus Root Device finished in 414 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 670 ms
FMAP: area UNIFIED_MRC_CACHE found @ 301000 (135168 bytes)
MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 11 ms
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
   PCI: 00:00.0 resource base fed64000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
   PCI: 00:00.0 resource base fed65000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 4
   PCI: 00:00.0 resource base c0000 size 3af40000 align 0 gran 0 limit 0 flags e0004200 index 5
   PCI: 00:00.0 resource base 3b000000 size 5000000 align 0 gran 0 limit 0 flags f0000200 index 6
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
   PCI: 00:00.0 resource base 11800000 size 400000 align 0 gran 0 limit 0 flags f0004200 index 9
   PCI: 00:00.0 resource base 11000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index a
   PCI: 00:00.0 resource base 12000000 size 100000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0 resource base 12150000 size 1000 align 0 gran 0 limit 0 flags f0004200 index c
   PCI: 00:00.0 resource base 12140000 size 10000 align 0 gran 0 limit 0 flags f0004200 index d
   PCI: 00:00.0 resource base 10000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index e
   PCI: 00:00.0 resource base 11c00000 size 400000 align 0 gran 0 limit 0 flags f0004200 index f
   PCI: 00:00.0 resource base 12100000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 10
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:0d.0
   PCI: 00:0d.1
   PCI: 00:0d.2
   PCI: 00:0d.3
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:0f.1
   PCI: 00:0f.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:0f.2
   PCI: 00:0f.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.1
   PCI: 00:15.1 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:16.1
   PCI: 00:16.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:16.2
   PCI: 00:16.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:16.3
   PCI: 00:16.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:17.0
   PCI: 00:17.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:17.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:17.1
   PCI: 00:17.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:17.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:17.2
   PCI: 00:17.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:17.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:17.3
   PCI: 00:17.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:17.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:18.0
   PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:18.1
   PCI: 00:18.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:18.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:18.2
   PCI: 00:18.2 resource base ddffc000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
   PCI: 00:18.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:19.1
   PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:19.2
   PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:1f.0
   PCI: 00:1f.1
  MMIO: fed40000
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 DOMAIN: 0000: Resource ranges:
 * Base: 0, Size: 3b0, Tag: 100
 * Base: 3e0, Size: fc20, Tag: 100
  PCI: 00:02.0 20 *  [0x0 - 0x3f] limit: 3f io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
 update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base 000c0000 limit 3affffff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base 3b000000 limit 3fffffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 11800000 limit 11bfffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 11000000 limit 117fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base 12000000 limit 120fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base 12150000 limit 12150fff mem (fixed)
 update_constraints: PCI: 00:00.0 0d base 12140000 limit 1214ffff mem (fixed)
 update_constraints: PCI: 00:00.0 0e base 10000000 limit 10ffffff mem (fixed)
 update_constraints: PCI: 00:00.0 0f base 11c00000 limit 11ffffff mem (fixed)
 update_constraints: PCI: 00:00.0 10 base 12100000 limit 1213ffff mem (fixed)
 update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 40000000, Size: 9dffc000, Tag: 200
 * Base: ddffd000, Size: 2003000, Tag: 200
 * Base: f0000000, Size: ed10000, Tag: 200
 * Base: fed18000, Size: 4c000, Tag: 200
 * Base: fed66000, Size: 129a000, Tag: 200
 * Base: 100000000, Size: 7f00000000, Tag: 100200
  PCI: 00:02.0 18 *  [0x40000000 - 0x4fffffff] limit: 4fffffff prefmem
  PCI: 00:02.0 10 *  [0x50000000 - 0x50ffffff] limit: 50ffffff mem
  PCI: 00:15.1 10 *  [0x51000000 - 0x511fffff] limit: 511fffff mem
  PCI: 00:15.0 10 *  [0x51200000 - 0x5120ffff] limit: 5120ffff mem
  PCI: 00:0f.0 10 *  [0x51210000 - 0x51210fff] limit: 51210fff mem
  PCI: 00:0f.1 10 *  [0x51211000 - 0x51211fff] limit: 51211fff mem
  PCI: 00:0f.2 10 *  [0x51212000 - 0x51212fff] limit: 51212fff mem
  PCI: 00:15.1 18 *  [0x51213000 - 0x51213fff] limit: 51213fff mem
  PCI: 00:16.0 10 *  [0x51214000 - 0x51214fff] limit: 51214fff mem
  PCI: 00:16.0 18 *  [0x51215000 - 0x51215fff] limit: 51215fff mem
  PCI: 00:16.1 10 *  [0x51216000 - 0x51216fff] limit: 51216fff mem
  PCI: 00:16.1 18 *  [0x51217000 - 0x51217fff] limit: 51217fff mem
  PCI: 00:16.2 10 *  [0x51218000 - 0x51218fff] limit: 51218fff mem
  PCI: 00:16.2 18 *  [0x51219000 - 0x51219fff] limit: 51219fff mem
  PCI: 00:16.3 10 *  [0x5121a000 - 0x5121afff] limit: 5121afff mem
  PCI: 00:16.3 18 *  [0x5121b000 - 0x5121bfff] limit: 5121bfff mem
  PCI: 00:17.0 10 *  [0x5121c000 - 0x5121cfff] limit: 5121cfff mem
  PCI: 00:17.0 18 *  [0x5121d000 - 0x5121dfff] limit: 5121dfff mem
  PCI: 00:17.1 10 *  [0x5121e000 - 0x5121efff] limit: 5121efff mem
  PCI: 00:17.1 18 *  [0x5121f000 - 0x5121ffff] limit: 5121ffff mem
  PCI: 00:17.2 10 *  [0x51220000 - 0x51220fff] limit: 51220fff mem
  PCI: 00:17.2 18 *  [0x51221000 - 0x51221fff] limit: 51221fff mem
  PCI: 00:17.3 10 *  [0x51222000 - 0x51222fff] limit: 51222fff mem
  PCI: 00:17.3 18 *  [0x51223000 - 0x51223fff] limit: 51223fff mem
  PCI: 00:18.0 10 *  [0x51224000 - 0x51224fff] limit: 51224fff mem
  PCI: 00:18.0 18 *  [0x51225000 - 0x51225fff] limit: 51225fff mem
  PCI: 00:18.1 10 *  [0x51226000 - 0x51226fff] limit: 51226fff mem
  PCI: 00:18.1 18 *  [0x51227000 - 0x51227fff] limit: 51227fff mem
  PCI: 00:18.2 18 *  [0x51228000 - 0x51228fff] limit: 51228fff mem
  PCI: 00:19.0 10 *  [0x51229000 - 0x51229fff] limit: 51229fff mem
  PCI: 00:19.0 18 *  [0x5122a000 - 0x5122afff] limit: 5122afff mem
  PCI: 00:19.1 10 *  [0x5122b000 - 0x5122bfff] limit: 5122bfff mem
  PCI: 00:19.1 18 *  [0x5122c000 - 0x5122cfff] limit: 5122cfff mem
  PCI: 00:19.2 10 *  [0x5122d000 - 0x5122dfff] limit: 5122dfff mem
  PCI: 00:19.2 18 *  [0x5122e000 - 0x5122efff] limit: 5122efff mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x0050000000 - 0x0050ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x0040000000 - 0x004fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000000000 - 0x000000003f] size 0x00000040 gran 0x06 io
PCI: 00:0f.0 10 <- [0x0051210000 - 0x0051210fff] size 0x00001000 gran 0x0c mem64
PCI: 00:0f.1 10 <- [0x0051211000 - 0x0051211fff] size 0x00001000 gran 0x0c mem64
PCI: 00:0f.2 10 <- [0x0051212000 - 0x0051212fff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.0 10 <- [0x0051200000 - 0x005120ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:15.1 10 <- [0x0051000000 - 0x00511fffff] size 0x00200000 gran 0x15 mem64
PCI: 00:15.1 18 <- [0x0051213000 - 0x0051213fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.0 10 <- [0x0051214000 - 0x0051214fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.0 18 <- [0x0051215000 - 0x0051215fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.1 10 <- [0x0051216000 - 0x0051216fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.1 18 <- [0x0051217000 - 0x0051217fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.2 10 <- [0x0051218000 - 0x0051218fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.2 18 <- [0x0051219000 - 0x0051219fff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.3 10 <- [0x005121a000 - 0x005121afff] size 0x00001000 gran 0x0c mem64
PCI: 00:16.3 18 <- [0x005121b000 - 0x005121bfff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.0 10 <- [0x005121c000 - 0x005121cfff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.0 18 <- [0x005121d000 - 0x005121dfff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.1 10 <- [0x005121e000 - 0x005121efff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.1 18 <- [0x005121f000 - 0x005121ffff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.2 10 <- [0x0051220000 - 0x0051220fff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.2 18 <- [0x0051221000 - 0x0051221fff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.3 10 <- [0x0051222000 - 0x0051222fff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.3 18 <- [0x0051223000 - 0x0051223fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.0 10 <- [0x0051224000 - 0x0051224fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.0 18 <- [0x0051225000 - 0x0051225fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.1 10 <- [0x0051226000 - 0x0051226fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.1 18 <- [0x0051227000 - 0x0051227fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.2 18 <- [0x0051228000 - 0x0051228fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.0 10 <- [0x0051229000 - 0x0051229fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.0 18 <- [0x005122a000 - 0x005122afff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.1 10 <- [0x005122b000 - 0x005122bfff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.1 18 <- [0x005122c000 - 0x005122cfff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 10 <- [0x005122d000 - 0x005122dfff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 18 <- [0x005122e000 - 0x005122efff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
   PCI: 00:00.0 resource base fed64000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
   PCI: 00:00.0 resource base fed65000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 4
   PCI: 00:00.0 resource base c0000 size 3af40000 align 0 gran 0 limit 0 flags e0004200 index 5
   PCI: 00:00.0 resource base 3b000000 size 5000000 align 0 gran 0 limit 0 flags f0000200 index 6
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
   PCI: 00:00.0 resource base 11800000 size 400000 align 0 gran 0 limit 0 flags f0004200 index 9
   PCI: 00:00.0 resource base 11000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index a
   PCI: 00:00.0 resource base 12000000 size 100000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0 resource base 12150000 size 1000 align 0 gran 0 limit 0 flags f0004200 index c
   PCI: 00:00.0 resource base 12140000 size 10000 align 0 gran 0 limit 0 flags f0004200 index d
   PCI: 00:00.0 resource base 10000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index e
   PCI: 00:00.0 resource base 11c00000 size 400000 align 0 gran 0 limit 0 flags f0004200 index f
   PCI: 00:00.0 resource base 12100000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 10
   PCI: 00:02.0
   PCI: 00:02.0 resource base 50000000 size 1000000 align 24 gran 24 limit 50ffffff flags 60000201 index 10
   PCI: 00:02.0 resource base 40000000 size 10000000 align 28 gran 28 limit 4fffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit 3f flags 60000100 index 20
   PCI: 00:0d.0
   PCI: 00:0d.1
   PCI: 00:0d.2
   PCI: 00:0d.3
   PCI: 00:0f.0
   PCI: 00:0f.0 resource base 51210000 size 1000 align 12 gran 12 limit 51210fff flags 60000201 index 10
   PCI: 00:0f.1
   PCI: 00:0f.1 resource base 51211000 size 1000 align 12 gran 12 limit 51211fff flags 60000201 index 10
   PCI: 00:0f.2
   PCI: 00:0f.2 resource base 51212000 size 1000 align 12 gran 12 limit 51212fff flags 60000201 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base 51200000 size 10000 align 16 gran 16 limit 5120ffff flags 60000201 index 10
   PCI: 00:15.1
   PCI: 00:15.1 resource base 51000000 size 200000 align 21 gran 21 limit 511fffff flags 60000201 index 10
   PCI: 00:15.1 resource base 51213000 size 1000 align 12 gran 12 limit 51213fff flags 60000201 index 18
   PCI: 00:16.0
   PCI: 00:16.0 resource base 51214000 size 1000 align 12 gran 12 limit 51214fff flags 60000201 index 10
   PCI: 00:16.0 resource base 51215000 size 1000 align 12 gran 12 limit 51215fff flags 60000201 index 18
   PCI: 00:16.1
   PCI: 00:16.1 resource base 51216000 size 1000 align 12 gran 12 limit 51216fff flags 60000201 index 10
   PCI: 00:16.1 resource base 51217000 size 1000 align 12 gran 12 limit 51217fff flags 60000201 index 18
   PCI: 00:16.2
   PCI: 00:16.2 resource base 51218000 size 1000 align 12 gran 12 limit 51218fff flags 60000201 index 10
   PCI: 00:16.2 resource base 51219000 size 1000 align 12 gran 12 limit 51219fff flags 60000201 index 18
   PCI: 00:16.3
   PCI: 00:16.3 resource base 5121a000 size 1000 align 12 gran 12 limit 5121afff flags 60000201 index 10
   PCI: 00:16.3 resource base 5121b000 size 1000 align 12 gran 12 limit 5121bfff flags 60000201 index 18
   PCI: 00:17.0
   PCI: 00:17.0 resource base 5121c000 size 1000 align 12 gran 12 limit 5121cfff flags 60000201 index 10
   PCI: 00:17.0 resource base 5121d000 size 1000 align 12 gran 12 limit 5121dfff flags 60000201 index 18
   PCI: 00:17.1
   PCI: 00:17.1 resource base 5121e000 size 1000 align 12 gran 12 limit 5121efff flags 60000201 index 10
   PCI: 00:17.1 resource base 5121f000 size 1000 align 12 gran 12 limit 5121ffff flags 60000201 index 18
   PCI: 00:17.2
   PCI: 00:17.2 resource base 51220000 size 1000 align 12 gran 12 limit 51220fff flags 60000201 index 10
   PCI: 00:17.2 resource base 51221000 size 1000 align 12 gran 12 limit 51221fff flags 60000201 index 18
   PCI: 00:17.3
   PCI: 00:17.3 resource base 51222000 size 1000 align 12 gran 12 limit 51222fff flags 60000201 index 10
   PCI: 00:17.3 resource base 51223000 size 1000 align 12 gran 12 limit 51223fff flags 60000201 index 18
   PCI: 00:18.0
   PCI: 00:18.0 resource base 51224000 size 1000 align 12 gran 12 limit 51224fff flags 60000201 index 10
   PCI: 00:18.0 resource base 51225000 size 1000 align 12 gran 12 limit 51225fff flags 60000201 index 18
   PCI: 00:18.1
   PCI: 00:18.1 resource base 51226000 size 1000 align 12 gran 12 limit 51226fff flags 60000201 index 10
   PCI: 00:18.1 resource base 51227000 size 1000 align 12 gran 12 limit 51227fff flags 60000201 index 18
   PCI: 00:18.2
   PCI: 00:18.2 resource base ddffc000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
   PCI: 00:18.2 resource base 51228000 size 1000 align 12 gran 12 limit 51228fff flags 60000201 index 18
   PCI: 00:19.0
   PCI: 00:19.0 resource base 51229000 size 1000 align 12 gran 12 limit 51229fff flags 60000201 index 10
   PCI: 00:19.0 resource base 5122a000 size 1000 align 12 gran 12 limit 5122afff flags 60000201 index 18
   PCI: 00:19.1
   PCI: 00:19.1 resource base 5122b000 size 1000 align 12 gran 12 limit 5122bfff flags 60000201 index 10
   PCI: 00:19.1 resource base 5122c000 size 1000 align 12 gran 12 limit 5122cfff flags 60000201 index 18
   PCI: 00:19.2
   PCI: 00:19.2 resource base 5122d000 size 1000 align 12 gran 12 limit 5122dfff flags 60000201 index 10
   PCI: 00:19.2 resource base 5122e000 size 1000 align 12 gran 12 limit 5122efff flags 60000201 index 18
   PCI: 00:1f.0
   PCI: 00:1f.1
  MMIO: fed40000
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2069 ms
POST: 0x94
POST: 0x94
BS: BS_DEV_ENABLE entry times (exec / console): 0 / 2 ms
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 8086/7270
PCI: 00:00.0 cmd <- 07
PCI: 00:02.0 subsystem <- 8086/7270
PCI: 00:02.0 cmd <- 03
PCI: 00:0f.0 subsystem <- 8086/7270
PCI: 00:0f.0 cmd <- 06
PCI: 00:0f.1 cmd <- 06
PCI: 00:0f.2 cmd <- 06
PCI: 00:15.0 subsystem <- 8086/7270
PCI: 00:15.0 cmd <- 02
PCI: 00:15.1 subsystem <- 8086/7270
PCI: 00:15.1 cmd <- 02
PCI: 00:16.0 subsystem <- 8086/7270
PCI: 00:16.0 cmd <- 02
PCI: 00:16.1 subsystem <- 8086/7270
PCI: 00:16.1 cmd <- 02
PCI: 00:16.2 subsystem <- 8086/7270
PCI: 00:16.2 cmd <- 02
PCI: 00:16.3 subsystem <- 8086/7270
PCI: 00:16.3 cmd <- 02
PCI: 00:17.0 subsystem <- 8086/7270
PCI: 00:17.0 cmd <- 02
PCI: 00:17.1 subsystem <- 8086/7270
PCI: 00:17.1 cmd <- 02
PCI: 00:17.2 subsystem <- 8086/7270
PCI: 00:17.2 cmd <- 02
PCI: 00:17.3 subsystem <- 8086/7270
PCI: 00:17.3 cmd <- 02
PCI: 00:18.0 subsystem <- 8086/7270
PCI: 00:18.0 cmd <- 02
PCI: 00:18.1 subsystem <- 8086/7270
PCI: 00:18.1 cmd <- 02
PCI: 00:18.2 subsystem <- 8086/7270
PCI: 00:18.2 cmd <- 06
PCI: 00:19.0 subsystem <- 8086/7270
PCI: 00:19.0 cmd <- 02
PCI: 00:19.1 subsystem <- 8086/7270
PCI: 00:19.1 cmd <- 02
PCI: 00:19.2 subsystem <- 8086/7270
PCI: 00:19.2 cmd <- 02
done.
BS: BS_DEV_ENABLE run times (exec / console): 0 / 122 ms
reply is too large
BS: BS_DEV_INIT entry times (exec / console): 2 / 2 ms
POST: 0x75
Initializing devices...
POST: 0x75
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000003b000000 size 0x3af40000 type 6
0x000000003b000000 - 0x0000000040000000 size 0x05000000 type 0
0x0000000040000000 - 0x0000000050000000 size 0x10000000 type 1
0x0000000050000000 - 0x0000000100000000 size 0xb0000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 39 bits
MTRR: default type WB/UC MTRR counts: 6/4.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6
MTRR: 1 base 0x000000003b000000 mask 0x0000007fff000000 type 0
MTRR: 2 base 0x000000003c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x0000000040000000 mask 0x0000007ff0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC...
 apic_id: 0x00 done.
Detected 4 core, 4 thread CPU.
Will perform SMM setup.
CBFS: Found 'cpu_microcode_blob.bin' @0xaa00 size 0xbc00 in mcache @0x3abfd070
microcode: sig=0x506c9 pf=0x2 revision=0x38
microcode: Update skipped, already up-to-date
CPU: Intel(R) Atom(TM) Processor E3950 @ 1.60GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 3 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 2 apic_id 6.
AP: slot 1 apic_id 2.
AP: slot 3 apic_id 4.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 0x00038000. Will call 0x3abc1cb8(0x00000000)
Installing permanent SMM handler to 0x3b000000
Loading module at 0x3b010000 with entry 0x3b0100a7. filesize: 0x2688 memsize: 0x66a0
Processing 302 relocs. Offset value of 0x3b010000
Loading module at 0x3b008000 with entry 0x3b008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x3b008000
SMM Module: placing jmp sequence at 0x3b007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 0x3b007800 rel16 0x07fd
SMM Module: placing jmp sequence at 0x3b007400 rel16 0x0bfd
SMM Module: stub loaded at 0x3b008000. Will call 0x3b0100a7(0x00000000)
Clearing SMI status registers
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3b000000, cpu = 0
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3afff800, cpu = 2
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3afffc00, cpu = 1
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3afff400, cpu = 3
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 506c9
CPU: family 06, model 5c, stepping 09
Clearing out pending MCEs
CPU #0 initialized
Initializing CPU #2
Initializing CPU #1
Initializing CPU #3
CPU: vendor Intel device 506c9
CPU: family 06, model 5c, stepping 09
CPU: vendor Intel device 506c9
CPU: family 06, model 5c, stepping 09
Clearing out pending MCEs
CPU: vendor Intel device 506c9
CPU: family 06, model 5c, stepping 09
CPU #1 initialized
Clearing out pending MCEs
Clearing out pending MCEs
CPU #2 initialized
CPU #3 initialized
bsp_do_flight_plan done after 178 msecs.
Enabling SMIs.
MTRR: TEMPORARY Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000003b000000 size 0x3af40000 type 6
0x000000003b000000 - 0x00000000ff800000 size 0xc4800000 type 0
0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5
MTRR: default type WB/UC MTRR counts: 12/4.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6
MTRR: 1 base 0x000000003b000000 mask 0x0000007fff000000 type 0
MTRR: 2 base 0x000000003c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x00000000ff800000 mask 0x0000007fff800000 type 5
CPU_CLUSTER: 0 init finished in 454 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init
PCI: 00:00.0 init finished in 0 msecs
POST: 0x75
PCI: 00:02.0 init
CBFS: Found 'vbt.bin' @0xb6000 size 0x513 in mcache @0x3abfd1c0
Found a VBT of 6154 bytes after decompression
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
PCI: 00:02.0 init finished in 20 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:0f.0 init
PCI: 00:0f.0 init finished in 0 msecs
POST: 0x75
PCI: 00:0f.1 init
PCI: 00:0f.1 init finished in 0 msecs
POST: 0x75
PCI: 00:0f.2 init
PCI: 00:0f.2 init finished in 0 msecs
POST: 0x75
PCI: 00:15.0 init
PCI: 00:15.0 init finished in 0 msecs
POST: 0x75
PCI: 00:15.1 init
Putting port 0 into host mode.
Timed out waiting for host mode.
XDCI port 0 host switch over took 10 ms
PCI: 00:15.1 init finished in 20 msecs
POST: 0x75
PCI: 00:16.0 init
I2C bus 0 version 0x3132312a
DW I2C bus 0 at 0x51214000 (400 KHz)
PCI: 00:16.0 init finished in 6 msecs
POST: 0x75
PCI: 00:16.1 init
I2C bus 1 version 0x3132312a
DW I2C bus 1 at 0x51216000 (400 KHz)
PCI: 00:16.1 init finished in 6 msecs
POST: 0x75
PCI: 00:16.2 init
I2C bus 2 version 0x3132312a
DW I2C bus 2 at 0x51218000 (400 KHz)
PCI: 00:16.2 init finished in 6 msecs
POST: 0x75
PCI: 00:16.3 init
I2C bus 3 version 0x3132312a
DW I2C bus 3 at 0x5121a000 (400 KHz)
PCI: 00:16.3 init finished in 6 msecs
POST: 0x75
PCI: 00:17.0 init
I2C bus 4 version 0x3132312a
DW I2C bus 4 at 0x5121c000 (400 KHz)
PCI: 00:17.0 init finished in 6 msecs
POST: 0x75
PCI: 00:17.1 init
I2C bus 5 version 0x3132312a
DW I2C bus 5 at 0x5121e000 (400 KHz)
PCI: 00:17.1 init finished in 6 msecs
POST: 0x75
PCI: 00:17.2 init
I2C bus 6 version 0x3132312a
DW I2C bus 6 at 0x51220000 (400 KHz)
PCI: 00:17.2 init finished in 6 msecs
POST: 0x75
PCI: 00:17.3 init
I2C bus 7 version 0x3132312a
DW I2C bus 7 at 0x51222000 (400 KHz)
PCI: 00:17.3 init finished in 6 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
MMIO: fed40000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:0d.0: enabled 0
PCI: 00:0d.1: enabled 0
PCI: 00:0d.2: enabled 0
PCI: 00:0d.3: enabled 0
PCI: 00:0e.0: enabled 0
PCI: 00:0f.0: enabled 1
PCI: 00:11.0: enabled 0
PCI: 00:12.0: enabled 0
PCI: 00:13.0: enabled 0
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 0
PCI: 00:13.3: enabled 0
PCI: 00:14.0: enabled 0
PCI: 00:14.1: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:16.3: enabled 1
PCI: 00:17.0: enabled 1
PCI: 00:17.1: enabled 1
PCI: 00:17.2: enabled 1
PCI: 00:17.3: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:1a.0: enabled 0
PCI: 00:1b.0: enabled 0
PCI: 00:1c.0: enabled 0
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 0
PCI: 00:1f.1: enabled 0
PCI: 00:0f.1: enabled 1
PCI: 00:0f.2: enabled 1
APIC: 02: enabled 1
APIC: 06: enabled 1
APIC: 04: enabled 1
BS: BS_DEV_INIT run times (exec / console): 102 / 712 ms
ME: Version: Unavailable
BS: BS_DEV_INIT exit times (exec / console): 1 / 3 ms
POST: 0x76
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms
POST: 0x77
BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
POST: 0x79
POST: 0x9c
CBFS: Found 'fallback/dsdt.aml' @0x30640 size 0x18c2 in mcache @0x3abfd120
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 3ab39000.
ACPI:    * FACS
ACPI:    * DSDT
PCI space above 4GB MMIO is at 0x100000000, len = 0x7f00000000
ACPI:    * FADT
SCI is IRQ9
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4/4 physical/logical core(s) each.
Turbo is available and visible
PSS: 1601MHz power 12000 control 0x1400 status 0x1400
PSS: 1600MHz power 12000 control 0x1000 status 0x1000
PSS: 1400MHz power 10258 control 0xe00 status 0xe00
PSS: 1200MHz power 8586 control 0xc00 status 0xc00
PSS: 1000MHz power 6990 control 0xa00 status 0xa00
PSS: 800MHz power 5466 control 0x800 status 0x800
PSS: 1601MHz power 12000 control 0x1400 status 0x1400
PSS: 1600MHz power 12000 control 0x1000 status 0x1000
PSS: 1400MHz power 10258 control 0xe00 status 0xe00
PSS: 1200MHz power 8586 control 0xc00 status 0xc00
PSS: 1000MHz power 6990 control 0xa00 status 0xa00
PSS: 800MHz power 5466 control 0x800 status 0x800
PSS: 1601MHz power 12000 control 0x1400 status 0x1400
PSS: 1600MHz power 12000 control 0x1000 status 0x1000
PSS: 1400MHz power 10258 control 0xe00 status 0xe00
PSS: 1200MHz power 8586 control 0xc00 status 0xc00
PSS: 1000MHz power 6990 control 0xa00 status 0xa00
PSS: 800MHz power 5466 control 0x800 status 0x800
PSS: 1601MHz power 12000 control 0x1400 status 0x1400
PSS: 1600MHz power 12000 control 0x1000 status 0x1000
PSS: 1400MHz power 10258 control 0xe00 status 0xe00
PSS: 1200MHz power 8586 control 0xc00 status 0xc00
PSS: 1000MHz power 6990 control 0xa00 status 0xa00
PSS: 800MHz power 5466 control 0x800 status 0x800
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * MADT
SCI is IRQ9
ACPI: added table 4/32, length now 52
current = 3ab3b710
ACPI:    * DMAR
ACPI: added table 5/32, length now 56
ACPI: added table 6/32, length now 60
ACPI:    * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 10320 bytes.
smbios_write_tables: 3ab38000
SMBIOS firmware version is set to coreboot_version: '4.13-729-g219caf8358-dirty'
Create SMBIOS type 16
Create SMBIOS type 17
SMBIOS tables: 689 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum f528
Writing coreboot table at 0x3ab5d000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000000fffffff: RAM
 4. 0000000010000000-0000000012150fff: RESERVED
 5. 0000000012151000-000000003ab37fff: RAM
 6. 000000003ab38000-000000003aba5fff: CONFIGURATION TABLES
 7. 000000003aba6000-000000003abf1fff: RAMSTAGE
 8. 000000003abf2000-000000003affffff: CONFIGURATION TABLES
 9. 000000003b000000-000000003fffffff: RESERVED
10. 00000000e0000000-00000000efffffff: RESERVED
11. 00000000fed10000-00000000fed17fff: RESERVED
12. 00000000fed64000-00000000fed65fff: RESERVED
SF: Detected 00 0000 with sector size 0x1000, total 0x800000
Wrote coreboot table at: 0x3ab5d000, 0x408 bytes, checksum 43db
coreboot table: 1056 bytes.
IMD ROOT    0. 0x3afff000 0x00001000
IMD SMALL   1. 0x3affe000 0x00001000
FSP MEMORY  2. 0x3abfe000 0x00400000
RO MCACHE   3. 0x3abfd000 0x000002fc
ROMSTG STCK 4. 0x3abfc000 0x00001000
AFTER CAR   5. 0x3abf2000 0x0000a000
RAMSTAGE    6. 0x3aba5000 0x0004d000
REFCODE     7. 0x3ab7a000 0x0002b000
ACPI GNVS   8. 0x3ab79000 0x00001000
SMM BACKUP  9. 0x3ab69000 0x00010000
4f444749   10. 0x3ab67000 0x00002000
EXT VBT11. 0x3ab65000 0x0000180a
COREBOOT   12. 0x3ab5d000 0x00008000
ACPI       13. 0x3ab39000 0x00024000
SMBIOS     14. 0x3ab38000 0x00000800
IMD small region:
  IMD ROOT    0. 0x3affec00 0x00000400
  FSP RUNTIME 1. 0x3affebe0 0x00000004
  FMAP        2. 0x3affe920 0x000002ae
  POWER STATE 3. 0x3affe8e0 0x00000040
  ROMSTAGE    4. 0x3affe8c0 0x00000004
  MEM INFO    5. 0x3affe6e0 0x000001e0
BS: BS_WRITE_TABLES run times (exec / console): 1 / 397 ms
POST: 0x7a
CBFS: Found 'fallback/payload' @0xd8dc0 size 0xf52f in mcache @0x3abfd258
Checking segment from ROM address 0xffd1bdf8
Payload being loaded at below 1MiB without region being marked as RAM usable.
Checking segment from ROM address 0xffd1be14
Loading segment from ROM address 0xffd1bdf8
  code (compression=1)
  New segment dstaddr 0x000e3300 memsize 0x1cd00 srcaddr 0xffd1be30 filesize 0xf4f7
Loading Segment: addr: 0x000e3300 memsz: 0x000000000001cd00 filesz: 0x000000000000f4f7
using LZMA
[ 0x000e3300, 00100000, 0x00100000) <- ffd1be30
Loading segment from ROM address 0xffd1be14
  Entry Point 0x000fd2d1
Loaded segments
BS: BS_PAYLOAD_LOAD run times (exec / console): 18 / 63 ms
POST: 0x95
POST: 0x95
POST: 0x88
POST: 0x89
CSE FWSTS1: 0x80003052
CSE FWSTS2: 0x30220000
CSE FWSTS3: 0x00000000
CSE FWSTS4: 0x00080004
CSE FWSTS5: 0x00000000
CSE FWSTS6: 0x00000000
ME: Manufacturing Mode      : YES
ME: FPF status              : unknown
Putting xHCI port 0 into host mode.
xHCI port 0 host switch over took 0 ms
BS: BS_PAYLOAD_LOAD exit times (exec / console): 5 / 33 ms
POST: 0x7b
mp_park_aps done after 0 msecs.
Jumping to boot code at 0x000fd2d1(0x3ab5d000)
POST: 0xf8
CPU0: stack: 0x3abe2000 - 0x3abe3000, lowest used address 0x3abe27bc, stack used: 2116 bytes
SeaBIOS (version rel-1.14.0-0-g155821a)
BUILD: gcc: (coreboot toolchain v6065f616eb 2020-10-28) 8.3.0 binutils: (GNU Binutils) 2.35
Found mainboard Up Squared
Relocating init from 0x000e4960 to 0x3aaecf20 (size 45088)
Found CBFS header at 0xffc43038
multiboot: eax=3abdd360, ebx=3abdd324
Found 20 PCI devices (max PCI bus is 00)
Copying SMBIOS entry point from 0x3ab38000 to 0x000f7560
Copying ACPI RSDP from 0x3ab39000 to 0x000f7530
table(50434146)=0x3ab3ab60 (via xsdt)
Using pmtimer, ioport 0x408
Scan for VGA option rom
Turning on vga text mode console
SeaBIOS (version rel-1.14.0-0-g155821a)
XHCI init on dev 00:15.0: regs @ 0x51200000, 15 ports, 32 slots, 32 byte contexts
XHCI    protocol USB  2.00, 8 ports (offset 1), def 3011
XHCI    protocol USB  3.00, 7 ports (offset 9), def 3000
XHCI    extcap 0xc0 @ 0x51208070
XHCI    extcap 0x1 @ 0x5120846c
XHCI    extcap 0xc6 @ 0x512084f4
XHCI    extcap 0xc7 @ 0x51208500
XHCI    extcap 0xc2 @ 0x51208600
XHCI    extcap 0xa @ 0x51208700
XHCI    extcap 0xc3 @ 0x51208740
XHCI    extcap 0xc4 @ 0x51208800
XHCI    extcap 0xc5 @ 0x51208900
WARNING - Timeout at i8042_flush:71!
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/coreinfo
XHCI port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
USB keyboard initialized
USB mouse initialized
Initialized USB HUB (2 ports used)
All threads complete.
Scan for option roms

Press ESC for boot menu.

Select boot device:

1. Payload [memtest]
2. Payload [coreinfo]

Searching bootorder for: HALT
Space available for UMB: c0000-ee800, f6d80-f7530
Returned 180224 bytes of ZoneHigh
e820 map has 10 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 0000000010000000 = 1 RAM
  4: 0000000010000000 - 0000000012151000 = 2 RESERVED
  5: 0000000012151000 - 000000003ab24000 = 1 RAM
  6: 000000003ab24000 - 0000000040000000 = 2 RESERVED
  7: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
  8: 00000000fed10000 - 00000000fed18000 = 2 RESERVED
  9: 00000000fed64000 - 00000000fed66000 = 2 RESERVED
enter handle_19:
  NULL
Booting from CBFS...
Run img/memtest
Calling addr 0x00010000