Hi Naresh,

Please find the details.

1.Platform/SOC ? -> Intel atom Denverton c3508

2. Verbose flashrom output(append -VVV in commandline)

# flashrom -p internal -w coreboot.rom -VVV
flashrom v1.1 on Linux 5.4.45 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

flashrom was built with libpci 3.5.5, GCC 8.4.0, little endian
Command line (5 args): flashrom -p internal -w coreboot.rom -VVV
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Initializing internal programmer
get_mtd_info: device_name: "BIOS", is_writeable: 1, numeraseregions: 0, total_size: 16777216, erasesize: 65536
Opened /dev/mtd0 successfully
The following protocols are supported: Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific).
coreboot last image size (not ROM size) is 16777216 bytes.
page_size=1000
pre-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000
post-rounding: start=0x00000000ff000000, len=0x1000000, end=0x0000000100000000
programmer_map_flash_region: mapping Opaque flash chip from 0x00000000ff000000 to 0x00007f0e65645000
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:Elinux_mtd_erase: ioctl: Input/output error
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 1... not defined. Looking for another erase function.
Trying erase function 2... not defined. Looking for another erase function.
Trying erase function 3... not defined. Looking for another erase function.
Trying erase function 4... not defined. Looking for another erase function.
Trying erase function 5... not defined. Looking for another erase function.
Trying erase function 6... not defined. Looking for another erase function.
Trying erase function 7... not defined. No usable erase functions left.
FAILED!
Uh oh. Erase/write failed. Checking if anything has changed.
Reading current flash chip contents... done.
Good, writing to the flash chip apparently didn't do anything.
This means we have to add special support for your board, programmer or flash
chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
-------------------------------------------------------------------------------
You may now reboot or simply leave the machine running.
page_size=1000
pre-rounding: start=0x00007f0e65645000, len=0x1000000, end=0x00007f0e66645000
post-rounding: start=0x00007f0e65645000, len=0x1000000, end=0x00007f0e66645000
programmer_unmap_flash_region: unmapped 0x00007f0e65645000

On Wed, Oct 14, 2020 at 9:54 AM Naresh G. Solanki <naresh.solanki.2011@gmail.com> wrote:

Can you provide info below:
1. Platform/SoC ?
2. Verbose flashrom output(append -VVV in commandline)

Regards,
Naresh

On Wed, Oct 14, 2020 at 8:03 PM Balaji Sivakumar <shivbalaji1985@gmail.com> wrote:
Hello Everyone,

We are using SPI flash(Macronix) to program the BIOS. And we use an external programmer to flash the BIOS (coreboot including FD+ME) into SPI Flash (16384 kB, SPI), it works fine and boots well. The board is functional and we have successfully booted a kernel on it.

Am working on adding a feature to upgrading the BIOS (complete IFD+ME+Coreboot) using intel-spi driver at the OS level. Able to successfully take the backup full 16MB spi nor flash data which includes IFD+ME+BIOS using flashrom Internal Programmer option and it is identified as Opaque flash chip and using dd command as well.

But we are seeing the erase fail through both flashrom and flash_erase utility. I believe it fails to erase at the flash descriptor location.

As far as Read/Write access to the SPI regions, I have enabled the Host CPU BIOS write access and ME Master Access as 0xFFFF through Intel FIT Tool but still not able to erase it and it fails.

Is there anything that could be preventing to enable read/write access to the Intel flash descriptor or any SOC SPI controller protection to access the Flash descriptor?

Any pointers would be appreciated.

Thanks
Balaji
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--
Best regards,
Naresh G. Solanki