Hi

 

While booting my Minnomboard with coreboot and UEFI, it hangs at below point while loading the payload.

 

I followed the procedure to download latest EDK2 tree and built UEFIPAYLOAD.fd and copied it to coreboot/payloads/external/tianocore folder and gave this path in make menuconfig.

 

Has anybody come across this?

 

BS: BS_PAYLOAD_LOAD times (us): entry 0 run 507070 exit 0

FspNotify(EnumInitPhaseReadyToBoot)

fsp_header_ptr: fffc0094

FSP Header Version: 1

FSP Revision: 3.3

Returned from FspNotify(EnumInitPhaseReadyToBoot)

POST: 0x7b

Jumping to boot code at 008002c0(7ac9f000)

POST: 0xf8

CPU0: stack: 0012c000 - 0012d000, lowest used address 0012cb10, stack used: 1264 bytes

entry    = 0x008002c0

lb_start = 0x00100000

lb_size  = 0x00035650

buffer   = 0x7ac34000

 

Regards

Mayuri

From: Mayuri Tendulkar
Sent: 17 May 2016 14:13
To: 'Zoran Stojsavljevic' <zoran.stojsavljevic@gmail.com>; coreboot@coreboot.org
Subject: Re: [coreboot] UEFI Payload in coreboot for Intel Minnowboard or Bayley bay

 

Hi Zoran and Martin

 

Today I was able to build UEFIPAYLOAD separately. I included .fd file while building coreboot.rom.

 

But while booting, getting some errors , so debugging those.

 

Need to check what more customizations to be done in UEFI for Minnowmax.

 

Has anybody tried it?

 

Regards

Mayuri

 

From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com]
Sent: 16 May 2016 21:04
To: Mayuri Tendulkar <mayuri.tendulkar@aricent.com>; coreboot@coreboot.org
Subject: Re: [coreboot] UEFI Payload in coreboot for Intel Minnowboard or Bayley bay

 

OK, Mayuri,

 

You brought an interesting point. And this point is to be not only investigated by you, rather also by me and, perhaps, Coreboot community.

 

Since here, in Bayern/Deutschland is Holiday Day, I went to buy a beer in Munchen HBf, and while walking there I was thinking about your use case. Thinking deeper.

 

I know that you are using some INTEL CPU/SoC (do not remember which one, if you said one). But, while recapping how BIOS looks like, I did notice that SEC and PEI phases have nothing to do with UEFI EDK2. EDK 2 comes to play in DXE phase, where EDK2 actually takes place/overtakes control...

 

It says to me one major thing I did not notice while ago: that ARM SoCs are also eligible to run on UEFI compliant OSes, namely WIN 8.1+ (including WIN 10 and WIN 10 Athens/RT WIN 10). Which makes very interesting IOT case namely for ARM, allowing it also to compete in WIN space.

 

Interestingly enough, this idea did not come to my mind till few hours ago... I guess, Vincent (Zimmer) already thought about that. ;-)

_______

 

Martin (Roth) just replied, to solve this immediate mystery. probably for the beginning only for INTEL SoCs, but, I really hope, ARM will also integrate in this concept seamlessly! :-)

 

Zoran

_______

 

On Mon, May 16, 2016 at 2:29 PM, Mayuri Tendulkar <mayuri.tendulkar@aricent.com> wrote:

Hi Zoran

 

I have checked that site and downloaded EDK2 code. I am trying to build it on Linux but facing some issues.

But if I generate payload file separately, I need to integrate it in coreboot separately.

 

So I am checking if there is way to build the payload in coreboot itself.

 

Regards

Mayuri

 

From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com]
Sent: 16 May 2016 17:57
To: Mayuri Tendulkar <mayuri.tendulkar@aricent.com>
Cc: coreboot@coreboot.org
Subject: Re: [coreboot] UEFI Payload in coreboot for Intel Minnowboard or Bayley bay

 

Hello Mayuri,

 

You should check payload called: Tiano Core (true UEFI payload).

 

Zoran

 

 

On Mon, May 16, 2016 at 2:12 PM, Mayuri Tendulkar <mayuri.tendulkar@aricent.com> wrote:

Hi

 

Is there any mechanism to build UEFI payload directly in coreboot similar like seabios?

 

Regards

Mayuri

"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."

--
coreboot mailing list: coreboot@coreboot.org
https://www.coreboot.org/mailman/listinfo/coreboot

 

"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."

 

"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."