If MCU is later, could you, please, explain how you did this in IVB Coreboot code (since this might be beneficial to Federico's attempts)?
Here I understood that you tried to compare IVB raminit.c source code with MRC algorithm, embedded in BIOS itself. And I have here one ignorant question: what is the difference between IVB (I assumed in this case SNB (tock), since I could not find IVB (tick) in rc/northbridge/intel/) raminit.c source code and MRC from IVB BIOS (there MUST be some difference, it is obvious, doesn't it)?
This is exactly the main point! And the main question here is the following: who wrote raminit.c code, and does this person did it using parts of IVB/SNB MRC source code? In other words, was this person member of SNB BIOS team from INTEL CCG?
This is also a good point. I need clarification on the following: "...will mean the MRC will be added back as an option next to the native raminit". Do you mean to have IVB/SNB MRC binary blob with defined APIs to be used as alternative to IVB/SNB raminit.c, since I am certain INTEL will not allow to have complete MRC added in Coreboot as source code (never was, never will be)?