diff -Nru coreboot-v2-3132/src/arch/i386/boot/pirq_routing.c coreboot-v2-3132-pirq/src/arch/i386/boot/pirq_routing.c
--- coreboot-v2-3132/src/arch/i386/boot/pirq_routing.c	2005-01-19 19:06:41.000000000 +0500
+++ coreboot-v2-3132-pirq/src/arch/i386/boot/pirq_routing.c	2008-03-11 10:53:18.000000000 +0500
@@ -1,6 +1,7 @@
 #include <console/console.h>
 #include <arch/pirq_routing.h>
 #include <string.h>
+#include <device/pci.h>
 
 #if (DEBUG==1 && HAVE_PIRQ_TABLE==1)
 static void check_pirq_routing_table(struct irq_routing_table *rt)
@@ -94,6 +95,80 @@
 	memcpy((void *)addr, &intel_irq_routing_table, intel_irq_routing_table.size);
 	printk_info("done.\n");
 	verify_copy_pirq_routing_table(addr);
+	pirq_routing_irqs(addr);
 	return addr + intel_irq_routing_table.size;
 }
 #endif
+
+#if (PIRQ_ROUTE==1 && HAVE_PIRQ_TABLE==1)
+void pirq_routing_irqs(unsigned long addr)
+{
+	int i, j, k, num_entries;
+	unsigned char irq_slot[4];
+	unsigned char pirq[4] = {0, 0, 0, 0};
+	struct irq_routing_table *pirq_tbl;
+	device_t pdev;
+
+	pirq_tbl = (struct irq_routing_table *)(addr);
+	num_entries = (pirq_tbl->size - 32) / 16;
+
+	/* Set PCI IRQs. */
+	for (i = 0; i < num_entries; i++) {
+
+		printk_debug("PIR Entry %d Dev/Fn: %X Slot: %d\n", i,
+			pirq_tbl->slots[i].devfn >> 3, pirq_tbl->slots[i].slot);
+
+		for (j = 0; j < 4; j++) {
+
+			int link = pirq_tbl->slots[i].irq[j].link;
+			int bitmap = pirq_tbl->slots[i].irq[j].bitmap & pirq_tbl->exclusive_irqs;
+			int irq = 0;
+
+			printk_debug("INT: %c link: %x bitmap: %x  ",
+				'A' + j, link, bitmap);
+
+			if (!bitmap|| !link || link > 4) {
+
+				printk_debug("not routed\n");
+				irq_slot[j] = irq;
+				continue;
+			}
+
+			/* yet not routed */
+			if (!pirq[link - 1]) {
+
+				for (k = 2; k < 15; k++) {
+
+					if (!((bitmap >> k) & 1))
+						continue;
+
+					irq = k;
+
+					/* yet not routed */
+					if (pirq[0] != irq && pirq[1] != irq && pirq[2] != irq && pirq[3] != irq)
+						break;
+				}
+
+				if (irq)
+					pirq[link - 1] = irq;
+			}
+			else
+				irq = pirq[link - 1];
+
+			printk_debug("IRQ: %d\n", irq);
+			irq_slot[j] = irq;
+		}
+
+		/* Bus, device, slots IRQs for {A,B,C,D}. */
+		pci_assign_irqs(pirq_tbl->slots[i].bus,
+			pirq_tbl->slots[i].devfn >> 3, irq_slot);
+	}
+
+	printk_debug("PIRQ1: %d\n", pirq[0]);
+	printk_debug("PIRQ2: %d\n", pirq[1]);
+	printk_debug("PIRQ3: %d\n", pirq[2]);
+	printk_debug("PIRQ4: %d\n", pirq[3]);
+
+	pirq_assign_irqs(pirq);
+}
+#endif
diff -Nru coreboot-v2-3132/src/arch/i386/include/arch/pirq_routing.h coreboot-v2-3132-pirq/src/arch/i386/include/arch/pirq_routing.h
--- coreboot-v2-3132/src/arch/i386/include/arch/pirq_routing.h	2005-07-07 00:17:35.000000000 +0600
+++ coreboot-v2-3132-pirq/src/arch/i386/include/arch/pirq_routing.h	2008-03-11 10:53:18.000000000 +0500
@@ -42,6 +42,12 @@
 #if HAVE_PIRQ_TABLE==1
 unsigned long copy_pirq_routing_table(unsigned long start);
 unsigned long write_pirq_routing_table(unsigned long start);
+#if PIRQ_ROUTE==1
+void pirq_routing_irqs(unsigned long start);
+void pirq_assign_irqs(const unsigned char pIntAtoD[4]);
+#else
+#define pirq_routing_irqs(start) {}
+#endif
 #else
 #define copy_pirq_routing_table(start) (start)
 #define write_pirq_routing_table(start) (start)
diff -Nru coreboot-v2-3132/src/config/Options.lb coreboot-v2-3132-pirq/src/config/Options.lb
--- coreboot-v2-3132/src/config/Options.lb	2008-02-26 00:36:20.000000000 +0500
+++ coreboot-v2-3132-pirq/src/config/Options.lb	2008-03-11 10:55:18.000000000 +0500
@@ -716,6 +716,11 @@
 	export used
 	comment "Define if we have a PIRQ table"
 end
+define PIRQ_ROUTE
+	default 0
+	export used
+	comment "Define if we have a PIRQ table and want routing irqs"
+end
 define IRQ_SLOT_COUNT
 	default none
 	export used
diff -Nru coreboot-v2-3132/src/southbridge/amd/cs5530/Config.lb coreboot-v2-3132-pirq/src/southbridge/amd/cs5530/Config.lb
--- coreboot-v2-3132/src/southbridge/amd/cs5530/Config.lb	2008-01-18 15:35:56.000000000 +0500
+++ coreboot-v2-3132-pirq/src/southbridge/amd/cs5530/Config.lb	2008-03-11 10:53:18.000000000 +0500
@@ -23,3 +23,4 @@
 driver cs5530_isa.o
 driver cs5530_ide.o
 driver cs5530_vga.o
+driver cs5530_pirq.o
diff -Nru coreboot-v2-3132/src/southbridge/amd/cs5530/cs5530_pirq.c coreboot-v2-3132-pirq/src/southbridge/amd/cs5530/cs5530_pirq.c
--- coreboot-v2-3132/src/southbridge/amd/cs5530/cs5530_pirq.c	1970-01-01 05:00:00.000000000 +0500
+++ coreboot-v2-3132-pirq/src/southbridge/amd/cs5530/cs5530_pirq.c	2008-03-11 10:53:18.000000000 +0500
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+#if (PIRQ_ROUTE==1 && HAVE_PIRQ_TABLE==1)
+void pirq_assign_irqs(const unsigned char pIntAtoD[4])
+{
+	device_t pdev;
+
+	pdev = dev_find_device(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, 0);
+
+	if (pdev) {
+
+		pci_write_config8(pdev, 0x5c, (pIntAtoD[1] << 4 | pIntAtoD[0]));
+		pci_write_config8(pdev, 0x5d, (pIntAtoD[3] << 4 | pIntAtoD[2]));
+	}
+}
+#endif
diff -Nru coreboot-v2-3132/src/southbridge/amd/cs5536/Config.lb coreboot-v2-3132-pirq/src/southbridge/amd/cs5536/Config.lb
--- coreboot-v2-3132/src/southbridge/amd/cs5536/Config.lb	2008-01-18 15:35:56.000000000 +0500
+++ coreboot-v2-3132-pirq/src/southbridge/amd/cs5536/Config.lb	2008-03-11 10:53:18.000000000 +0500
@@ -20,3 +20,4 @@
 config chip.h
 driver cs5536.o
 driver cs5536_ide.o
+driver cs5536_pirq.o
diff -Nru coreboot-v2-3132/src/southbridge/amd/cs5536/cs5536_pirq.c coreboot-v2-3132-pirq/src/southbridge/amd/cs5536/cs5536_pirq.c
--- coreboot-v2-3132/src/southbridge/amd/cs5536/cs5536_pirq.c	1970-01-01 05:00:00.000000000 +0500
+++ coreboot-v2-3132-pirq/src/southbridge/amd/cs5536/cs5536_pirq.c	2008-03-11 10:53:18.000000000 +0500
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+#if (PIRQ_ROUTE==1 && HAVE_PIRQ_TABLE==1)
+void pirq_assign_irqs(const unsigned char pIntAtoD[4])
+{
+	device_t pdev;
+
+	pdev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
+
+	if (pdev) {
+		pci_write_config16(pdev, 0x5c, (pIntAtoD[3] << 12 | pIntAtoD[2] << 8 | pIntAtoD[1] << 4 | pIntAtoD[0]));
+	}
+}
+#endif
