Greetings .

We are working on intel c508 intel denverton board . It has a soldered 4GB DDR4 connected to Channel 0 , Dimm 0 .

Below are the changes made :

1. We are using harcuvar board as a reference . I have selected * Enable Memory down option in menu config

2. Added spd values file in src/mainboard/intel/harcuvar/spd/spd_filename.hex

3. spd.bn getting generated in CBFS

FMAP REGION: COREBOOT

Name Offset Type Size Comp

cbfs master header 0x0 cbfs header 32 none

fallback/romstage 0x80 stage 43844 none

cpu_microcode_blob.bin 0xac40 microcode 11264 none

fallback/ramstage 0xd8c0 stage 71762 none

config 0x1f180 raw 1353 none

revision 0x1f740 raw 694 none

spd.bin 0x1fa40 spd 512 none

fallback/dsdt.aml 0x1fc80 raw 7791 none

fallback/postcar 0x21b40 stage 23808 none

fallback/payload 0x27880 simple elf 656810 none

(empty) 0xc7e80 null 6651672 none

fspt.bin 0x71fdc0 fsp 4096 none

(empty) 0x720e00 null 3992 none

fspm.bin 0x721dc0 fsp 589824 none

(empty) 0x7b1e00 null 3992 none

fsps.bin 0x7b2dc0 fsp 102400 none

(empty) 0x7cbe00 null 114584 none

bootblock 0x7e7dc0 bootblock 32768 none

COREBOOT-4.13 PrivateBuild:saurabh Thu Jun 30 18:39:22 IST 2022 bootblock starting

FSP TempRamInit successful...

Timestamp - end of bootblock: 47603172

FMAP: Found "FLASH" version 1.1 at 0x810000.

FMAP: base = 0xff000000 size = 0x1000000 #areas = 4

FMAP: area COREBOOT found @ 810200 (8322560 bytes)

CBFS DEBUG: Looking for next file @0x0...

CBFS DEBUG: Found CBFS header @0x0 (type 2, attr +0x0, data +0x38, length 0x20)

CBFS DEBUG: File name: 'cbfs master header'

CBFS DEBUG: Looking for next file @0x58...

CBFS DEBUG: Found CBFS header @0x80 (type 16, attr +0x0, data +0x64, length 0xab44)

CBFS DEBUG: File name: 'fallback/romstage'

CBFS: Found 'fallback/romstage' @0x80 size 0xab44

Timestamp - starting to load romstage: 136192248

Timestamp - finished loading romstage: 143418624

BS: bootblock times (exec / console): total (unknown) / 74 ms

4. Tried giving 512 values

CONFIG_DIMM_SPD_SIZE=512

5. Using 4GB DDR4 module.

MT40A512M16LY-062E IT:E

We are using Fitc tool to generate full FW image, getting below error and got stuck after loading the build

======================================================================================

COREBOOT-4.13 PrivateBuild:saurabh Thu Jun 30 18:39:22 IST 2022 romstage starting

FSP TempRamInit was successful...

Board ID: 0x52.

GPIO table: 0xff81a144, entry num: 0x1!

Changing GpioPad PID: c2 Offset: 0x400 PadModeP1: 0 P2: 1 R: 0x45000200 Fx45000600 !

TCO base address set to 0x400!

FMAP: area COREBOOT found @ 810200 (8322560 bytes)

CBFS DEBUG: Looking for next file @0x0...

CBFS DEBUG: Found CBFS header @0x0 (type 2, attr +0x0, data +0x38, length 0x20)

CBFS DEBUG: File name: 'cbfs master header'

CBFS DEBUG: Looking for next file @0x58...

CBFS DEBUG: Found CBFS header @0x80 (type 16, attr +0x0, data +0x64, length 0xab44)

CBFS DEBUG: File name: 'fallback/romstage'

CBFS DEBUG: Looking for next file @0xac28...

CBFS DEBUG: Found CBFS header @0xac40 (type 83, attr +0x38, data +0x50, length 0x2c00)

CBFS DEBUG: File name: 'cpu_microcode_blob.bin'

CBFS DEBUG: Looking for next file @0xd890...

CBFS DEBUG: Found CBFS header @0xd8c0 (type 16, attr +0x0, data +0x38, length 0x11853)

CBFS DEBUG: File name: 'fallback/ramstage'

CBFS DEBUG: Looking for next file @0x1f14b...

CBFS DEBUG: Found CBFS header @0x1f180 (type 80, attr +0x28, data +0x38, length 0x549)

CBFS DEBUG: File name: 'config'

CBFS DEBUG: Looking for next file @0x1f701...

CBFS DEBUG: Found CBFS header @0x1f740 (type 80, attr +0x28, data +0x38, length 0x2b6)

CBFS DEBUG: File name: 'revision'

CBFS DEBUG: Looking for next file @0x1fa2e...

CBFS DEBUG: Found CBFS header @0x1fa40 (type 171, attr +0x28, data +0x38, length 0x200)

CBFS DEBUG: File name: 'spd.bin'

CBFS DEBUG: Looking for next file @0x1fc78...

CBFS DEBUG: Found CBFS header @0x1fc80 (type 80, attr +0x38, data +0x48, length 0x1e6f)

CBFS DEBUG: File name: 'fallback/dsdt.aml'

CBFS DEBUG: Looking for next file @0x21b37...

CBFS DEBUG: Found CBFS header @0x21b40 (type 16, attr +0x0, data +0x38, length 0x5d00)

CBFS DEBUG: File name: 'fallback/postcar'

CBFS DEBUG: Looking for next file @0x27878...

CBFS DEBUG: Found CBFS header @0x27880 (type 32, attr +0x0, data +0x38, length 0xa05aa)

CBFS DEBUG: File name: 'fallback/payload'

CBFS DEBUG: Looking for next file @0xc7e62...

CBFS DEBUG: Found CBFS header @0xc7e80 (type -1, attr +0x0, data +0x28, length 0x657f18)

CBFS DEBUG: Looking for next file @0x71fdc0...

CBFS DEBUG: Found CBFS header @0x71fdc0 (type 96, attr +0x28, data +0x40, length 0x1000)

CBFS DEBUG: File name: 'fspt.bin'

CBFS DEBUG: Looking for next file @0x720e00...

CBFS DEBUG: Found CBFS header @0x720e00 (type -1, attr +0x0, data +0x28, length 0xf98)

CBFS DEBUG: Looking for next file @0x721dc0...

CBFS DEBUG: Found CBFS header @0x721dc0 (type 96, attr +0x28, data +0x40, length 0x90000)

CBFS DEBUG: File name: 'fspm.bin'

CBFS: Found 'fspm.bin' @0x721dc0 size 0x90000

Spec version: v2.0

Revision: 0.0.1, Build Number 18

Type: release/test

image ID: DNV-FSP0, base 0xfff32000 + 0x90000

Config region 0x18c + 0x200

Memory init offset 0x450

Timestamp - before RAM initialization: 2111263908

FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)

MRC: no data in 'RW_MRC_CACHE'

bootmode is set to: 0

Relaxing the Security Config for SPI. mupd->FspmConfig.RelaxSecConfig

FMAP: area COREBOOT found @ 810200 (8322560 bytes)

CBFS DEBUG: Looking for next file @0x0...

CBFS DEBUG: Found CBFS header @0x0 (type 2, attr +0x0, data +0x38, length 0x20)

CBFS DEBUG: File name: 'cbfs master header'

CBFS DEBUG: Looking for next file @0x58...

CBFS DEBUG: Found CBFS header @0x80 (type 16, attr +0x0, data +0x64, length 0xab44)

CBFS DEBUG: File name: 'fallback/romstage'

CBFS DEBUG: Looking for next file @0xac28...

CBFS DEBUG: Found CBFS header @0xac40 (type 83, attr +0x38, data +0x50, length 0x2c00)

CBFS DEBUG: File name: 'cpu_microcode_blob.bin'

CBFS DEBUG: Looking for next file @0xd890...

CBFS DEBUG: Found CBFS header @0xd8c0 (type 16, attr +0x0, data +0x38, length 0x11853)

CBFS DEBUG: File name: 'fallback/ramstage'

CBFS DEBUG: Looking for next file @0x1f14b...

CBFS DEBUG: Found CBFS header @0x1f180 (type 80, attr +0x28, data +0x38, length 0x549)

CBFS DEBUG: File name: 'config'

CBFS DEBUG: Looking for next file @0x1f701...

CBFS DEBUG: Found CBFS header @0x1f740 (type 80, attr +0x28, data +0x38, length 0x2b6)

CBFS DEBUG: File name: 'revision'

CBFS DEBUG: Looking for next file @0x1fa2e...

CBFS DEBUG: Found CBFS header @0x1fa40 (type 171, attr +0x28, data +0x38, length 0x200)

CBFS DEBUG: File name: 'spd.bin'

CBFS: Found 'spd.bin' @0x1fa40 size 0x200

SPD spd_data[i] 23

SPD spd_data[i] 11

SPD spd_data[i] c

SPD spd_data[i] 3

SPD spd_data[i] 56

SPD spd_data[i] 21

SPD spd_data[i] 0

SPD spd_data[i] 8

SPD spd_data[i] 0

SPD spd_data[i] 3

SPD spd_data[i] 2

SPD spd_data[i] b

SPD spd_data[i] 0

SPD spd_data[i] 8

SPD spd_data[i] d

SPD spd_data[i] fc

SPD spd_data[i] ab

SPD spd_data[i] ae

SPD spd_data[i] 0

SPD spd_data[i] 78

SPD spd_data[i] 11

SPD spd_data[i] 8

SPD spd_data[i] 80

SPD spd_data[i] f0

SPD spd_data[i] a

SPD spd_data[i] 20

SPD spd_data[i] 8

SPD spd_data[i] 0

SPD spd_data[i] 5

SPD spd_data[i] 0

SPD spd_data[i] f0

SPD spd_data[i] 2b

SPD spd_data[i] 34

SPD spd_data[i] 2b

SPD spd_data[i] 0

SPD spd_data[i] 78

SPD spd_data[i] 0

SPD spd_data[i] 14

SPD spd_data[i] 3c

SPD spd_data[i] 0

SPD spd_data[i] c

SPD spd_data[i] 2b

SPD spd_data[i] 2d

SPD spd_data[i] 4

SPD spd_data[i] 16

SPD spd_data[i] 35

SPD spd_data[i] 23

SPD spd_data[i] d

SPD spd_data[i] 0

SPD spd_data[i] 2c

SPD spd_data[i] b

SPD spd_data[i] 3

SPD spd_data[i] 24

SPD spd_data[i] 35

SPD spd_data[i] c

SPD spd_data[i] 3

SPD spd_data[i] 2d

SPD spd_data[i] 0

SPD spd_data[i] ec

SPD spd_data[i] 9c

SPD spd_data[i] b4

SPD spd_data[i] 0

SPD spd_data[i] e7

SPD spd_data[i] c1

SPD spd_data[i] a9

SPD spd_data[i] 4d

SPD spd_data[i] f

SPD spd_data[i] 11

SPD spd_data[i] 0

SPD spd_data[i] 38

SPD spd_data[i] 41

SPD spd_data[i] 54

SPD spd_data[i] 46

SPD spd_data[i] 35

SPD spd_data[i] 31

SPD spd_data[i] 32

SPD spd_data[i] 36

SPD spd_data[i] 34

SPD spd_data[i] 48

SPD spd_data[i] 5a

SPD spd_data[i] 2d

SPD spd_data[i] 32

SPD spd_data[i] 47

SPD spd_data[i] 31

SPD spd_data[i] 41

SPD spd_data[i] 32

SPD spd_data[i] 0

SPD spd_data[i] 32

SPD spd_data[i] 80

SPD spd_data[i] 2c

SPD spd_data[i] 41

SPD spd_data[i] 0

Memory Down function is enabled!

0x0000000000000d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs

0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC

0x0000000000000000: IA32_MTRR_FIX64K_00000

0x00000000 - 0x0007ffff: UC

0x0000000000000000: IA32_MTRR_FIX16K_80000

0x00080000 - 0x0009ffff: UC

0x0000000000000000: IA32_MTRR_FIX16K_A0000

0x000a0000 - 0x000bffff: UC

0x0000000000000000: IA32_MTRR_FIX4K_C0000

0x000c0000 - 0x000c7fff: UC

0x0000000000000000: IA32_MTRR_FIX4K_C8000

0x000c8000 - 0x000cffff: UC

0x0000000000000000: IA32_MTRR_FIX4K_D0000

0x000d0000 - 0x000d7fff: UC

0x0000000000000000: IA32_MTRR_FIX4K_D8000

0x000d8000 - 0x000dffff: UC

0x0000000000000000: IA32_MTRR_FIX4K_E0000

0x000e0000 - 0x000e7fff: UC

0x0000000000000000: IA32_MTRR_FIX4K_E8000

0x000e8000 - 0x000effff: UC

0x0000000000000000: IA32_MTRR_FIX4K_F0000

0x000f0000 - 0x000f7fff: UC

0x0000000000000000: IA32_MTRR_FIX4K_F8000

0x000f8000 - 0x000fffff: UC

0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB

0x0000007ffff00800: PHYMASK0: Length = 0x0000000000100000, Valid

0x00000000ff000005: PHYBASE1: Address = 0x00000000ff000000, WP

0x0000007fff000800: PHYMASK1: Length = 0x0000000001000000, Valid

0x0000000000000000: PHYBASE2

0x0000000000000000: PHYMASK2: Disabled

0x0000000000000000: PHYBASE3

0x0000000000000000: PHYMASK3: Disabled

0x0000000000000000: PHYBASE4

0x0000000000000000: PHYMASK4: Disabled

0x0000000000000000: PHYBASE5

0x0000000000000000: PHYMASK5: Disabled

0x0000000000000000: PHYBASE6

0x0000000000000000: PHYMASK6: Disabled

0x0000000000000000: PHYBASE7

0x0000000000000000: PHYMASK7: Disabled

0x0000000000000000: PHYBASE8

0x0000000000000000: PHYMASK8: Disabled

0x0000000000000000: PHYBASE9

0x0000000000000000: PHYMASK9: Disabled

Architectural UPD values for MemoryInit at: 0xfef0fce0

0x01: Revision

0x00000000: NvsBufferPtr

0xfefb0000 --> 0xfef60100: StackBase

0x0004ff00: StackSize

0x00000000 --> 0x00002000: BootLoaderTolumSize

0x00000000: BootMode

UPD values for MemoryInit:

0x02: PcdSmmTsegSize

0x00: PcdFspDebugPrintErrorLevel

0xa0: PcdSpdSmbusAddress_0_0

0xa2: PcdSpdSmbusAddress_0_1

0xa4: PcdSpdSmbusAddress_1_0

0xa6: PcdSpdSmbusAddress_1_1

0x00: PcdMrcRmtSupport

0x0c: PcdMrcRmtCpgcExpLoopCntValue

0x06: PcdMrcRmtCpgcNumBursts

0x00: PcdMemoryPreservation

0x01: PcdFastBoot

0x01: PcdEccSupport

0x00: PcdHsuartDevice

0x00 --> 0x01: PcdMemoryDown

0x01: PcdEnableSATA0

0x01: PcdEnableSATA1

0x01: PcdEnableIQAT

0x00: PcdSmbusSpdWriteDisable

0x00: PcdEnableMeShutdown

0x01: PcdEnableXhci

0x06: PcdDdrFreq

0x00: PcdMmioSize

0x01: PcdMeHeciCommunication

0x14: PcdHsioLanesNumber

0x00000000: PcdFiaMuxConfigPtr

0x00: PcdHalfWidthEnable

0x01: PcdTclIdle

0x03: PcdInterleaveMode

0x00: PcdMemoryThermalThrottling

0x00: PcdSkipMemoryTest

0x08: PcdUsb2Port1Pin

0x08: PcdUsb2Port2Pin

0x08: PcdUsb2Port3Pin

0x08: PcdUsb2Port4Pin

0x08: PcdUsb3Port1Pin

0x08: PcdUsb3Port2Pin

0x08: PcdUsb3Port3Pin

0x08: PcdUsb3Port4Pin

0x00: PcdIOxAPIC0_199

0x00: PcdDmapX16

0xfef0fcc0: 44 4e 56 55 50 44 5f 4d 01 00 00 00 00 00 00 00 DNVUPD_M........

0xfef0fcd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0xfef0fce0: 01 00 00 00 00 00 00 00 00 01 f6 fe 00 ff 04 00 ................

0xfef0fcf0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 . ..............

0xfef0fd00: 02 00 a0 a2 a4 a6 00 0c 06 00 01 01 00 01 00 10 ................

0xfef0fd10: f1 fe 01 01 01 00 00 01 06 00 01 14 00 00 00 00 ................

0xfef0fd20: 76 65 72 73 69 6f 6e 20 78 78 78 00 00 00 00 00 version xxx.....

0xfef0fd30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0xfef0fd40: 00 01 03 00 00 00 00 00 00 08 08 08 08 08 08 08 ................

0xfef0fd50: 08 00 00 01 01 00 00 00 00 00 00 00 00 00 00 00 ................

0xfef0fd60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

...

0xfef0feb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa 55 ...............U

Calling FspMemoryInit: 0xfff32450

0xfef0fcc0: raminit_upd

0xfef10f6c: &hob_list_ptr

Timestamp - calling FspMemoryInit: 4524096604

Any help on this is highly appreciated .

Thanks

Somanna Ankaiah