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Cannot flash the BIOS with FPT utilities under Elkhart Lake platform
by Steve Chen 30 Aug '21

30 Aug '21

I tried to update the BIOS through FPT utilities. FPT.exe -F coreboot.rom I got the error message Error 167, protected Range register are set by BIOS... I checked my SPI_BAR register SPI_BAR + 4 [15] =0 (FLOCKDN SPI_BAR + C = 0x0 SPI_BAR + DC [1] = 1 Enable BLE SPI_BAR + DC [5] = 1 Enable EISS Is it caused by BLE and EISS? If yes, how can I change the register to disable BLE and EISS? -- Steve

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New on blogs.coreboot.org: OSFC 2021 - Going Full Open-Source
by blogs.coreboot.org 29 Aug '21

29 Aug '21

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How to add superIO support with serial port logic enabled ?
by jiom jiom 26 Aug '21

26 Aug '21

Thank for help! We want to add UART functions on the board,it is superio to use eSPI interface, How to recognize this interface in thesystem, there is currently modified bootblck.c and devicetree.cb, have otherplaces to modify? Hicari

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A different lapic number in devicetree.cb needed for CPU with the same SKU and steping (Intel Atom C3538).
by dponamorev＠gmail.com 25 Aug '21

25 Aug '21

Hi! We developed our CRB motherboard on Intel Atom C3538 (4 core) Denverton_NS processor. Faced with the following problem. For part of processors with the same SKU and steping (Atom C3538), lapic #4 in devicetree.cb needed (95%), and for the other part lapic #0 (5%). Intel confirmed that it might be so and that's okay ... Part of devicetree.cb: device cpu_cluster 0 on device lapic 4 on end end If we do not specify lapic id correctly in devicetree.cb, freeBSD OS does not BOOT (Unix like). FreeBSD BOOT log (set lapic #4 in devicetree.cb but need lapic #0): Table 'FACP' at 0x7f768070 Table 'SSDT' at 0x7f768170 Table 'MCFG' at 0x7f7693e0 Table 'APIC' at 0x7f769420 APIC: Found table at 0x7f769420 APIC: Using the MADT enumerator. MADT: Found CPU APIC ID 0 ACPI ID 0: enabled SMP: Added CPU 0 (AP) MADT: Found CPU APIC ID 4 ACPI ID 1: enabled SMP: Added CPU 4 (AP) MADT: Found CPU APIC ID 12 ACPI ID 2: enabled SMP: Added CPU 12 (AP) MADT: Found CPU APIC ID 16 ACPI ID 3: enabled SMP: Added CPU 16 (AP) MADT: Found CPU APIC ID 24 ACPI ID 4: enabled SMP: Added CPU 24 (AP) Copyright (c) 1992-2019 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 11.3-RELEASE #0 r349754: Fri Jul 5 04:45:24 UTC 2019 root@releng2.nyi.freebsd.org:/usr/obj/usr/src/sys/GENERIC amd64 FreeBSD clang version 8.0.0 (tags/RELEASE_800/final 356365) (based on LLVM 8.0.0) Table 'FACP' at 0x7f768070 Table 'SSDT' at 0x7f768170 Table 'MCFG' at 0x7f7693e0 Table 'APIC' at 0x7f769420 Table 'HPET' at 0x7f7694a0 ACPI: No SRAT table found PPIM 0: PA=0xa0000, VA=0xffffffff82410000, size=0x10000, mode=0 VT(vga): resolution 640x480 Preloaded elf kernel "/boot/kernel/kernel" at 0xffffffff8226d000. Calibrating TSC clock ... TSC clock: 2100071708 Hz CPU: Intel(R) Atom(TM) CPU C3538 @ 2.10GHz (2100.07-MHz K8-class CPU) Origin="GenuineIntel" Id=0x506f1 Family=0x6 Model=0x5f Stepping=1 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x4ff8ebbf<SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,TSCDLT,AESNI,XSAVE,OSXSAVE,RDRAND> AMD Features=0x2c100800<SYSCALL,NX,Page1GB,RDTSCP,LM> AMD Features2=0x101<LAHF,Prefetch> Structured Extended Features=0x2294e283<FSGSBASE,TSCADJ,SMEP,ERMS,NFPUSG,MPX,PQE,RDSEED,SMAP,CLFLUSHOPT,PROCTRACE,SHA> Structured Extended Features3=0xac000400<MD_CLEAR,IBPB,STIBP,ARCH_CAP,SSBD> XSAVE Features=0xf<XSAVEOPT,XSAVEC,XINUSE,XSAVES> IA32_ARCH_CAPS=0x69<RDCL_NO,SKIP_L1DFL_VME> VT-x: Basic Features=0xda0400<SMM,INS/OUTS,TRUE> Pin-Based Controls=0xff<ExtINT,NMI,VNMI,PreTmr,PostIntr> Primary Processor Controls=0xfff9fffe<INTWIN,TSCOff,HLT,INVLPG,MWAIT,RDPMC,RDTSC,CR3-LD,CR3-ST,CR8-LD,CR8-ST,TPR,NMIWIN,MOV-DR,IO,IOmap,MTF,MSRmap,MONITOR,PAUSE> Secondary Processor Controls=0x1d6fff<APIC,EPT,DT,RDTSCP,x2APIC,VPID,WBINVD,UG,APIC-reg,VID,PAUSE-loop,RDRAND,VMFUNC,VMCS,XSAVES> Exit Controls=0xda0400<PAT-LD,EFER-SV,PTMR-SV> Entry Controls=0xda0400 EPT Features=0x6334141<XO,PW4,UC,WB,2M,1G,INVEPT,AD,single,all> VPID Features=0xf01<INVVPID,individual,single,all,single-globals> TSC: P-state invariant, performance statistics DTLB: 4k pages, fully associative, 32 entries Data TLB: 4 KBytes pages, 4-way set associative, 512 entries Instruction TLB: 4 KByte pages, fully associative, 48 entries DTLB: 2M/4M Byte pages, 4-way associative, 32 entries L2 cache: 2048 kbytes, 16-way associative, 64 bytes/line real memory = 8589934592 (8192 MB) Physical memory chunk(s): 0x0000000000010000 - 0x000000000009bfff, 573440 bytes (140 pages) 0x0000000000100000 - 0x00000000001fffff, 1048576 bytes (256 pages) 0x0000000002400000 - 0x000000007f74ffff, 2100625408 bytes (512848 pages) 0x0000000100000000 - 0x000000027012efff, 6175256576 bytes (1507631 pages) avail memory = 8220336128 (7839 MB) Table 'FACP' at 0x7f768070 Table 'SSDT' at 0x7f768170 Table 'MCFG' at 0x7f7693e0 Table 'APIC' at 0x7f769420 Table 'HPET' at 0x7f7694a0 ACPI: No DMAR table found Event timer "LAPIC" quality 600 ACPI APIC Table: <COREv4 COREBOOT> WARNING: L1 data cache covers less APIC IDs than a core 0 < 1 Package ID shift: 5 L2 cache ID shift: 2 L1 cache ID shift: 1 Core ID shift: 1 panic: AP #4 (PHY# 0) failed! cpuid = 0 KDB: stack backtrace: #0 0xffffffff80b4c4b7 at kdb_backtrace+0x67 #1 0xffffffff80b054ce at vpanic+0x17e #2 0xffffffff80b05343 at panic+0x43 #3 0xffffffff80f752a4 at native_start_all_aps+0x344 #4 0xffffffff80f74c4f at cpu_mp_start+0x2ef #5 0xffffffff80b5cb76 at mp_start+0xa6 #6 0xffffffff80aa0b48 at mi_startup+0x118 #7 0xffffffff8031202c at btext+0x2c Uptime: 1s Other Linux OS boot but show an incorrect number of cores (5 instead of 4) and offline processor cores appear (see log). Ubuntu 18.04 LTS (GNU/Linux 4.15.0-20-generic x86_64) # lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 5 On-line CPU(s) list: 0,2-4 Off-line CPU(s) list: 1 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 95 Model name: Intel(R) Atom(TM) CPU C3538 @ 2.10GHz Stepping: 1 CPU MHz: 2097.502 CPU max MHz: 2100.0000 CPU min MHz: 800.0000 BogoMIPS: 4200.00 Virtualization: VT-x L1d cache: 24K L1i cache: 32K L2 cache: 2048K NUMA node0 CPU(s): 0,2-4 What can be done in this situation? How to make a universal version of devicetree.cb?

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KGPE-D16 coreboot support open call
by Piotr Król 23 Aug '21

23 Aug '21

Hi all, since Immunefi was so kind to put 15k EUR pledge for [1] we host open call where we will discuss future of KGPE-D16 and its coreboot support. If you interested about this hardware feel free to join at 15:00 UTC: https://meet.3mdeb.com/kgpe-d16-refresh We will post minutes on github. [1] https://github.com/osresearch/heads/issues/719 -- Piotr Król Founder and Chief Executive Officer GPG: B2EE71E967AA9E4C https://3mdeb.com | @3mdeb_com

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[RFC] Intel split stack IIO design support in coreboot - new multidomain approach
by Szafranski, MariuszX 20 Aug '21

20 Aug '21

Hi, RFC/initial proposal how to implement split IIO in coreboot: [RFC] Intel IIO split stack - multidomain approach (I38ac830e) * Gerrit Code Review (coreboot.org)<https://review.coreboot.org/c/coreboot/+/56263> thx for all comments, suggestions BR, Mariusz -------------------------------------------------------------- Intel Research and Development Ireland Limited Registered in Ireland Registered Office: Collinstown Industrial Park, Leixlip, County Kildare Registered Number: 308263 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.

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denverton_ns: failed to write RW_MRC_CACHE
by Sumo 20 Aug '21

20 Aug '21

Hi, I'm stuck in a problem where coreboot fails to write the MRC cache in the SPI Flash. Below is the log output: FMAP: area RW_MRC_CACHE found @ 810000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected 00 0000 with sector size 0x1000, total 0x1000000 MRC: no data in 'RW_MRC_CACHE' MRC: cache data 'RW_MRC_CACHE' needs update. SPI Transaction Error at Flash Offset 810000 HSFSTS = 0x01046003 REGF metadata allocation failed: 1949 data blocks 4096 total blocks MRC: failed to update 'RW_MRC_CACHE'. Any clues? Thanks, Sumo

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coreboot Wiki contribution workflow, old Wiki and how to increase the contributions
by Mike Banon 20 Aug '21

20 Aug '21

On Fri, Aug 20, 2021 at 10:07 AM Keith Emery <k.emery.nbn(a)internode.on.net> wrote: > Guy's if the WiKi is unmaintained can we just get rid of it. Google loves > directing people to it, and it's incredibly confusing / misleading. Before getting rid of the old Wiki, the community should look through it page-by-page and move all the important still-valid stuff to the new Wiki. To avoid losing anything of value! Of course, if the contribution process to the new Wiki would've been a real-time WYSIWYG write&publish process just like at so many established successful Wikis - and without requiring the upvotes from other people to commit each contribution! - there'd be a lot more activity and this would have already happened. I believe that the current process of contributing to the coreboot documentation is inefficient, and not just me. On one of 3mdeb's past vBeers, Alexey Vazhnov described how tricky could it be to get merged the coreboot docs and shared his experiences at this post: https://www.reddit.com/r/coreboot/comments/lm7jh8/my_pain_with_documentatio… Old wiki died because the people willing to contribute were prevented from doing so by a closed registration roadblock and had to go elsewhere with their manuals - which now are scattered all over the Internet, i.e. stuff like this could've been on a coreboot wiki - http://dangerousprototypes.com/docs/Flashing_KB9012_with_Bus_Pirate#Craftin… . But, if the simplification of Wiki contribution process isn't done out of fear of bots/spammers, you can always set up an advanced math captcha like _____||| 3*x^7 + x^6 + 2*x^5 + 4*x^4 + 4*x^3 lim ------------------------------------------ x->0 ||| 5*x^5 + 4*x^4 + 3*x^3 which takes a minute to learn how to solve even if you don't know how at the moment.

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Re: Firmware another laptop
by Keith Emery 20 Aug '21

20 Aug '21

The list of supported hardware, and other information is available here: https://doc.coreboot.org/mainboard/index.html Of course with enough information you can always be able to run core-boot, the caveat being you have to write the code for it. On the off chance that you do, and it is working, please remember to push the changes. It's incredibly frustrating to have a report that says: 'yeah this works, just use this git commit that doesn't exist'. I wound up buying two F2A85-M main-boards only to find the code has mysteriously disappeared. PS: Guy's if the WiKi is unmaintained can we just get rid of it. Google loves directing people to it, and it's incredibly confusing / misleading. .On 20/8/21 8:30 am, Stefano wrote: > Thank you for the answer. > This is my machine: > https://termbin.com/yiyx <https://termbin.com/yiyx> > > System: Kernel: 5.4.0-81-generic x86_64 bits: 64 compiler: gcc v: 9.3.0 Desktop: Cinnamon 5.0.5 > wm: muffin dm: LightDM Distro: Linux Mint 20.2 Uma base: Ubuntu 20.04 focal > Machine: Type: Portable System: Alienware product: Alienware 17 v: A17 serial: <filter> Chassis: > type: 8 v: A17 serial: <filter> > Mobo: Alienware model: 04WT2G v: A00 serial: <filter> UEFI: Alienware v: A17 > date: 07/22/2019 > Battery: ID-1: BAT1 charge: 70.9 Wh condition: 70.9/88.8 Wh (80%) volts: 17.0/14.8 > model: Simplo PABAS0241231 serial: <filter> status: Full > CPU: Topology: Quad Core model: Intel Core i7-4910MQ bits: 64 type: MT MCP arch: Haswell > rev: 3 L2 cache: 8192 KiB > flags: avx avx2 lm nx pae sse sse2 sse3 sse4_1 sse4_2 ssse3 vmx bogomips: 46296 > Speed: 873 MHz min/max: 800/4100 MHz Core speeds (MHz): 1: 798 2: 798 3: 798 4: 798 > 5: 798 6: 799 7: 798 8: 802 > Graphics: Device-1: NVIDIA GK104M [GeForce GTX 880M] vendor: Dell driver: nvidia v: 460.91.03 > bus ID: 01:00.0 chip ID: 10de:1198 > Display: x11 server: X.Org 1.20.11 driver: nvidia > unloaded: fbdev,modesetting,nouveau,vesa resolution: 1920x1080~60Hz > OpenGL: renderer: GeForce GTX 880M/PCIe/SSE2 v: 4.6.0 NVIDIA 460.91.03 > direct render: Yes > Audio: Device-1: Intel 8 Series/C220 Series High Definition Audio vendor: Dell > driver: snd_hda_intel v: kernel bus ID: 00:1b.0 chip ID: 8086:8c20 > Device-2: NVIDIA GK104 HDMI Audio vendor: Dell driver: snd_hda_intel v: kernel > bus ID: 01:00.1 chip ID: 10de:0e0a > Sound Server: ALSA v: k5.4.0-81-generic > Network: Device-1: Qualcomm Atheros Killer E220x Gigabit Ethernet vendor: Dell driver: alx > v: kernel port: 3000 bus ID: 08:00.0 chip ID: 1969:e091 > IF: enp8s0 state: down mac: <filter> > Device-2: Intel Wireless 7260 driver: iwlwifi v: kernel port: 3000 bus ID: 0a:00.0 > chip ID: 8086:08b1 > IF: wlp10s0 state: up mac: <filter> > Drives: Local Storage: total: 1.14 TiB used: 32.96 GiB (2.8%) > ID-1: /dev/sda vendor: Toshiba model: MQ01ABD100 size: 931.51 GiB speed: 6.0 Gb/s > serial: <filter> > ID-2: /dev/sdb vendor: LITE-ON IT model: LMT-256M6M mSATA 256GB size: 238.47 GiB > speed: 6.0 Gb/s serial: <filter> > RAID: Hardware-1: Intel 82801 Mobile SATA Controller [RAID mode] driver: ahci v: 3.0 > bus ID: 00:1f.2 chip ID: 8086.282a > Partition: ID-1: / size: 231.54 GiB used: 16.28 GiB (7.0%) fs: ext4 dev: /dev/dm-1 > ID-2: /boot size: 704.5 MiB used: 407.9 MiB (57.9%) fs: ext4 dev: /dev/sdb2 > ID-3: swap-1 size: 976.0 MiB used: 0 KiB (0.0%) fs: swap dev: /dev/dm-2 > Sensors: System Temperatures: cpu: 50.0 C mobo: N/A gpu: nvidia temp: 50 C > Fan Speeds (RPM): N/A > Repos: No active apt repos in: /etc/apt/sources.list > Active apt repos in: /etc/apt/sources.list.d/freedownloadmanager.list > 1: deb [arch=amd64] https: //debrepo.freedownloadmanager.org/ bionic main > Active apt repos in: /etc/apt/sources.list.d/official-package-repositories.list > 1: deb http: //packages.linuxmint.com uma main upstream import backport > 2: deb http: //archive.ubuntu.com/ubuntu <http://archive.ubuntu.com/ubuntu> focal main restricted universe multiverse > 3: deb http: //archive.ubuntu.com/ubuntu <http://archive.ubuntu.com/ubuntu> focal-updates main restricted universe multiverse > 4: deb http: //archive.ubuntu.com/ubuntu <http://archive.ubuntu.com/ubuntu> focal-backports main restricted universe multiverse > 5: deb http: //security.ubuntu.com/ubuntu/ <http://security.ubuntu.com/ubuntu/> focal-security main restricted universe multiverse > 6: deb http: //archive.canonical.com/ubuntu/ <http://archive.canonical.com/ubuntu/> focal partner > Active apt repos in: /etc/apt/sources.list.d/spotify.list > 1: deb http: //repository.spotify.com stable non-free > Info: Processes: 293 Uptime: 4h 42m Memory: 15.56 GiB used: 1.82 GiB (11.7%) Init: systemd > v: 245 runlevel: 5 Compilers: gcc: 9.3.0 alt: 9 Client: Unknown python3.8 client > inxi: 3.0.38 > > > Sent with ProtonMail <https://protonmail.com/> Secure Email. > > ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ > Il venerdì 20 agosto 2021 00:11, Keith Emery > <k.emery.nbn(a)internode.on.net> ha scritto: >> >> I think you meant to ask if it's possible to do. That can't be >> answered without more information about the hardware... A lot more. >> >> At a minimum the precise model of mainboard, or a precise model number. >> >> >> On 20/8/21 12:02 am, Stefano via coreboot wrote: >>> Good morning I can install the coreboot firmware on my dell >>> alienware 17 with Linux mint (updated to the latest version)? >>> >>> Best regards >>> Stefano >>> >>> >>> Sent with ProtonMail <https://protonmail.com/> Secure Email. >>> >>> >>> _______________________________________________ >>> coreboot mailing list --coreboot(a)coreboot.org <mailto:coreboot@coreboot.org> >>> To unsubscribe send an email tocoreboot-leave(a)coreboot.org <mailto:coreboot-leave@coreboot.org> >

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Firmware another laptop
by Stefano 20 Aug '21

20 Aug '21

Good morning I can install the coreboot firmware on my dell alienware 17 with Linux mint (updated to the latest version)? Best regards Stefano Sent with [ProtonMail](https://protonmail.com/) Secure Email.

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