coreboot October 2015

coreboot@coreboot.org

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137 discussions

Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13
by Reto Rayen 22 Oct '15

22 Oct '15

Hi guys When i try with a pxe image (ipxe rom image), then it gets not loaded. Can may anyone help to get this bios working with ipxe. Here are the logs of the startup: http://pastebin.com/ASfZGsZD Thank you in advance. Gesendet von Mail für Windows 10 Von: Reto Rayen Gesendet: Mittwoch, 21. Oktober 2015 22:59 An: Martin Roth;coreboot(a)coreboot.org Betreff: Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13 Hi guys i get it working to boot up a coreboot bios with coreboot version 4.0. Thanks to PaulePanter Here are the steps: 1.) Clone the coreboot git -> git clone http://review.coreboot.org/coreboot.git 2.) Revert back to the coreboot version -> git reset --hard a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e 3.) Download the following .config file for compiling -> http://review.coreboot.org/gitweb?p=board-status.git;a=blob_plain;f=pcengin… 4.) Open the .config file with «make menuconfig» and close it again 5.) As least you do the «make» and write the coreboot bios on your «Pc Engines Alix2d13». PaulePanter will help me now get coreboot bios working with the master code. So with the actual coreboot 4.1 Gesendet von Mail für Windows 10 Von: Reto Rayen Gesendet: Mittwoch, 21. Oktober 2015 15:30 An: Martin Roth Betreff: Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13 Thank you Martin I will try it out and let you know. Gesendet von Mail für Windows 10 Von: Martin Roth Gesendet: Mittwoch, 21. Oktober 2015 00:48 An: Reto Rayen Betreff: Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13 Hi! We can absolutely help. Generally the best way to get coreboot help is on the #coreboot IRC channel on freenode.net. If you plan to continue working with coreboot, you probably want to set up an IRC client, but for now, you can use a web interface: https://webchat.freenode.net/?channels=#coreboot The first things we're going to want are a console log, and to know how the system is configured (Your .config) These would generally get posted to your favorite text file site, then just give us the URL ( pastebin.com ) In your case, I'd recommend that you look at the alix2d configuration that was posted to the coreboot board-status repository. http://review.coreboot.org/gitweb?p=board-status.git;a=tree;f=pcengines/ali… I'd suggest that you check out the revision of the git repo listed in the revision.txt file, copy the config.txt to your .config (save yours first), and try to build a binary similar to what was used before. You can then compare your console output to what was posted. Hope this helps. Martin On Tue, Oct 20, 2015 at 4:15 PM, Reto Rayen <retorayen(a)hotmail.com> wrote: > Hi guys i am writing to about compiling a coreboot 4.1 bios for the PC > Engines Alix 2d13 with ipxe support. > > > > I tried so many different ways and even with «VSA image» with blob support, > but the bios start always hangs after «RAM initialization». Can may anyone > help me? > > > > Thank you in advance. > > > > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13
by Reto Rayen 21 Oct '15

21 Oct '15

Hi guys i get it working to boot up a coreboot bios with coreboot version 4.0. Thanks to PaulePanter Here are the steps: 1.) Clone the coreboot git -> git clone http://review.coreboot.org/coreboot.git 2.) Revert back to the coreboot version -> git reset --hard a0a3727dbbd7f3ae9f9021e0797ce2fc61d1b79e 3.) Download the following .config file for compiling -> http://review.coreboot.org/gitweb?p=board-status.git;a=blob_plain;f=pcengin… 4.) Open the .config file with «make menuconfig» and close it again 5.) As least you do the «make» and write the coreboot bios on your «Pc Engines Alix2d13». PaulePanter will help me now get coreboot bios working with the master code. So with the actual coreboot 4.1 Gesendet von Mail für Windows 10 Von: Reto Rayen Gesendet: Mittwoch, 21. Oktober 2015 15:30 An: Martin Roth Betreff: Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13 Thank you Martin I will try it out and let you know. Gesendet von Mail für Windows 10 Von: Martin Roth Gesendet: Mittwoch, 21. Oktober 2015 00:48 An: Reto Rayen Betreff: Re: [coreboot] Coreboot 4.1 for PC Engines Alix 2d13 Hi! We can absolutely help. Generally the best way to get coreboot help is on the #coreboot IRC channel on freenode.net. If you plan to continue working with coreboot, you probably want to set up an IRC client, but for now, you can use a web interface: https://webchat.freenode.net/?channels=#coreboot The first things we're going to want are a console log, and to know how the system is configured (Your .config) These would generally get posted to your favorite text file site, then just give us the URL ( pastebin.com ) In your case, I'd recommend that you look at the alix2d configuration that was posted to the coreboot board-status repository. http://review.coreboot.org/gitweb?p=board-status.git;a=tree;f=pcengines/ali… I'd suggest that you check out the revision of the git repo listed in the revision.txt file, copy the config.txt to your .config (save yours first), and try to build a binary similar to what was used before. You can then compare your console output to what was posted. Hope this helps. Martin On Tue, Oct 20, 2015 at 4:15 PM, Reto Rayen <retorayen(a)hotmail.com> wrote: > Hi guys i am writing to about compiling a coreboot 4.1 bios for the PC > Engines Alix 2d13 with ipxe support. > > > > I tried so many different ways and even with «VSA image» with blob support, > but the bios start always hangs after «RAM initialization». Can may anyone > help me? > > > > Thank you in advance. > > > > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] GPL license headers
by Alex G. 21 Oct '15

21 Oct '15

On 10/21/2015 12:11 AM, Patrick Georgi wrote: > One issue brought up the last time we had this discussion was that > lawyers prefer to have their tools (eg. license scanners) continue to > work, which is why we shouldn't reduce the length too much Do those tools do the following? if (contains(file->pathname, "linux")) { file->license = "GPLv2"; break; } I ask because I've seen a lot of two-, or even one-liners in the linux tree. uboot is even crazier, with one-liners and a three-letter designation for the license. 'licensecheck' correctly identifies and versions GPL with just the first paragraph. > (we had a number of proposals with just two lines back then). I might be partially guilty for that. Alex

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Re: [coreboot] GPL license headers
by Patrick Georgi 21 Oct '15

21 Oct '15

One issue brought up the last time we had this discussion was that lawyers prefer to have their tools (eg. license scanners) continue to work, which is why we shouldn't reduce the length too much (we had a number of proposals with just two lines back then). Referring to an external file is alright, as long as you assume that the code never leaves the context of the repository. Patrick -- Google Germany GmbH, ABC-Str. 19, 20354 Hamburg Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg Geschäftsführer: Matthew Scott Sucherman, Paul Terence Manicle

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Coreboot 4.1 for PC Engines Alix 2d13
by Reto Rayen 21 Oct '15

21 Oct '15

Hi guys i am writing to about compiling a coreboot 4.1 bios for the PC Engines Alix 2d13 with ipxe support. I tried so many different ways and even with «VSA image» with blob support, but the bios start always hangs after «RAM initialization». Can may anyone help me? Thank you in advance.

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Re: [coreboot] GPL license headers
by ron minnich 21 Oct '15

21 Oct '15

Let me ask around. ron On Tue, Oct 20, 2015 at 7:20 PM Martin Roth <gaumless(a)gmail.com> wrote: > I haven't seen any disagreement that we get rid of the entire third > paragraph. > > Alex votes that we should get rid of the second paragraph of the > header as well, and what Ron posted SEEMS to support that we can, > although the wording in that license header might be different enough > that it doesn't apply to our case. > > Personally, I'm in favor of keeping the second paragraph. It looks to > me like the first paragraph just discusses distribution, not > liability. I don't really see any NEED to get rid of the second > paragraph. > > Are there any other thoughts either way on getting rid of the second > paragraph? > > Martin > > > > On Tue, Oct 20, 2015 at 6:47 PM, Alex G. <mr.nuke.me(a)gmail.com> wrote: > > On 10/20/2015 10:54 AM, ron minnich wrote: > >> Eben Moglen, who ought to know, guided us on the release rules for the > >> Plan 9 GPL release. > >> > >> Here is what he told us could go in each file: > >> /* > >> * This file is part of the UCB release of Plan 9. It is subject to the > >> license > >> * terms in the LICENSE file found in the top-level directory of this > >> * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. > No > >> * part of the UCB release of Plan 9, including this file, may be > copied, > >> * modified, propagated, or distributed except according to the terms > >> contained > >> * in the LICENSE file. > >> */ > > > > +2 > > > >> On Tue, Oct 20, 2015 at 10:30 AM Patrick Georgi <pgeorgi(a)google.com > >> <mailto:pgeorgi@google.com>> wrote: > >> Get (the right set of) lawyers to sign off on that. > > > > You were saying, Patrick? > > > > Alex > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > http://www.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] GPL license headers
by Alex G. 21 Oct '15

21 Oct '15

On 10/20/2015 10:54 AM, ron minnich wrote: > Eben Moglen, who ought to know, guided us on the release rules for the > Plan 9 GPL release. > > Here is what he told us could go in each file: > /* > * This file is part of the UCB release of Plan 9. It is subject to the > license > * terms in the LICENSE file found in the top-level directory of this > * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No > * part of the UCB release of Plan 9, including this file, may be copied, > * modified, propagated, or distributed except according to the terms > contained > * in the LICENSE file. > */ +2 > On Tue, Oct 20, 2015 at 10:30 AM Patrick Georgi <pgeorgi(a)google.com > <mailto:pgeorgi@google.com>> wrote: > Get (the right set of) lawyers to sign off on that. You were saying, Patrick? Alex

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Re: [coreboot] Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by David Hendricks 21 Oct '15

21 Oct '15

Cool, glad it worked! To make things slightly easier, you should also try keeping the CMOS battery and DIM (whatever that is) in. On Tue, Oct 20, 2015 at 4:51 PM, Arpita Biswas <arpita.biswas07(a)gmail.com> wrote: > Hi David, > > That did the trick !!! Thanks a bunch ! For anyone else interested, here > is the combination of things I did : > > SOIC config as (1) mentioned earlier + held down the power button for 30 > sec to reset it + removed CMOS battery + removed jumper on SPI header (that > cuts off the processor signal to SPI chip) + plugged in the power cable > (that way enough power was there throughout the board for dediprog to > detect) + removed the DIM (dunno if that made any difference, but did it > since a post mentioned it anyways!). > > Dediprog then detected it sweetly :) :) > > Cheers, > - Arpita > > On Tue, Oct 20, 2015 at 2:05 PM, David Hendricks <dhendrix(a)google.com> > wrote: > >> >> >> On Tue, Oct 20, 2015 at 12:26 PM, Arpita Biswas < >> arpita.biswas07(a)gmail.com> wrote: >> >>> Hi all, >>> >>> I am trying to update BIOS with coreboot onto HP Envy H87 haswell >>> chipset (ipm87_mp) >>> <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am >>> using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). >>> However dediprog doesn't detect the chip when it's soldered on-board. On >>> removing the chip from board, I can detect/read/write onto it without any >>> issues. >>> >>> I've tried (and failed) with the following configurations : >>> (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP >>> (IO2) ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD >>> (IO3) ---> 3.3V, VCC ---> 3.3V with motherboard power ON. >>> >>> (2) Same config as above but I tried to isolate the chip by removing >>> CMOS battery + removing jumper on SPI header + powering OFF the motherboard. >>> >>> (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. >>> >>> (4) I tried using flashrom on the box too as internal programmer, but it >>> did not recognize the SPI chip. Error log says "Found Programmer flash chip >>> "Opaque flash chip" (8192 kB, Programmer-specific)." >>> >>> I've a feeling that something on the motherboard is interfering with the >>> SPI chip since an off-board chip is working fine. Does anybody have any >>> pointers on what could be going wrong ? >>> >> >> I suspect your motherboard does not isolate the SPI ROM's voltage supply >> and thus your Dediprog is effectively powering other components on the >> board. >> >> If you can find a way to hold the PCH and ME in reset while the board is >> powered on, that might work. Or, with the board off, you can try using an >> external power supply (the usual warnings about possibly frying your board >> apply). >> >> >> >>> >>> Thanks in advance, >>> - Arpita >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> http://www.coreboot.org/mailman/listinfo/coreboot >>> >> >> >> >> -- >> David Hendricks (dhendrix) >> Systems Software Engineer, Google Inc. >> > > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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Re: [coreboot] Trying to flash coreboot onto on-board SPI chip of HP Envy H87 haswell chipset.
by Arpita Biswas 21 Oct '15

21 Oct '15

Hi David, That did the trick !!! Thanks a bunch ! For anyone else interested, here is the combination of things I did : SOIC config as (1) mentioned earlier + held down the power button for 30 sec to reset it + removed CMOS battery + removed jumper on SPI header (that cuts off the processor signal to SPI chip) + plugged in the power cable (that way enough power was there throughout the board for dediprog to detect) + removed the DIM (dunno if that made any difference, but did it since a post mentioned it anyways!). Dediprog then detected it sweetly :) :) Cheers, - Arpita On Tue, Oct 20, 2015 at 2:05 PM, David Hendricks <dhendrix(a)google.com> wrote: > > > On Tue, Oct 20, 2015 at 12:26 PM, Arpita Biswas <arpita.biswas07(a)gmail.com > > wrote: > >> Hi all, >> >> I am trying to update BIOS with coreboot onto HP Envy H87 haswell >> chipset (ipm87_mp) >> <http://www.newegg.com/Product/Product.aspx?Item=9SIA6392VN4810>. I am >> using Dediprog + SOIC 8-pin flash clip for flashing the SPI chip (W25Q64). >> However dediprog doesn't detect the chip when it's soldered on-board. On >> removing the chip from board, I can detect/read/write onto it without any >> issues. >> >> I've tried (and failed) with the following configurations : >> (1) SPI pin ------> Dediprog : /CS ---> CS, DO (IO1) ---> MISO, /WP (IO2) >> ---> 3.3V, GND ---> GND, DI (IO0) ---> MOSI, CLK ---> CLK, /HOLD (IO3) ---> >> 3.3V, VCC ---> 3.3V with motherboard power ON. >> >> (2) Same config as above but I tried to isolate the chip by removing CMOS >> battery + removing jumper on SPI header + powering OFF the motherboard. >> >> (3) Similar as (1) and (2), but let /HOLD, /Vcc and /WP float. >> >> (4) I tried using flashrom on the box too as internal programmer, but it >> did not recognize the SPI chip. Error log says "Found Programmer flash chip >> "Opaque flash chip" (8192 kB, Programmer-specific)." >> >> I've a feeling that something on the motherboard is interfering with the >> SPI chip since an off-board chip is working fine. Does anybody have any >> pointers on what could be going wrong ? >> > > I suspect your motherboard does not isolate the SPI ROM's voltage supply > and thus your Dediprog is effectively powering other components on the > board. > > If you can find a way to hold the PCH and ME in reset while the board is > powered on, that might work. Or, with the board off, you can try using an > external power supply (the usual warnings about possibly frying your board > apply). > > > >> >> Thanks in advance, >> - Arpita >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot >> > > > > -- > David Hendricks (dhendrix) > Systems Software Engineer, Google Inc. >

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Re: [coreboot] screwdriver 0.3.0 released
by Alexander Couzens 21 Oct '15

21 Oct '15

On Tue, 20 Oct 2015 09:23:00 -0400 Gregg Levine <gregg.drwho8(a)gmail.com> wrote: > Hello! > I'm impressed. In fact the wiki page is easy to understand. How well > does the USB debug module perform? Also for setting up the board to do > that, you should include a write up as well. Although I believe there > was one earlier in the Wiki. any thoughts how to do that? could you write a small draft on what you exactly mean? best, lynxis ps. a pull-request is also welcome ;) -- Alexander Couzens mail: lynxis(a)fe80.eu jabber: lynxis(a)fe80.eu mobile: +4915123277221 gpg: 390D CF78 8BF9 AA50 4F8F F1E2 C29E 9DA6 A0DF 8604

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coreboot October 2015