January 2014 - coreboot - mail.coreboot.org

Need help to compile an AMD Geode GX2 VSA Binary
by jamie＠toasty.dk Jan. 10, 2014

Jan. 10, 2014

Hi Quentin, I can tell you how I got the toolchain and source files in place, and compiled my own amd_vsa_lx.bin. How we take this further and modify the code for the GX2 is another matter. Perhaps we can get some help with this from Nils Jacobs... I did all my work in VirtualBox VMs, starting with a fresh install of Windows 2000, updated to SP4, plus some newer patches. C drive is NTFS. Then I did the following: Install unzip: I used this one: http://gnuwin32.sourceforge.net/packages/unzip.htm Install MASM 6.11: download it from: http://cvrce.blog.com/2009/08/28/masm-v611-free-download/  run setup.exe from the disk1 directory NT only MASM.EXE: no Help files: no Sample programs: no Install to C:\MASM611\BIN add to path C:\MASM611\BIN Patch to MASM 6.14: unpack ML614.EXE to a temporary directory Follow the directions in README.TXT copy patch files to C:\MASM611 - PATCH.EXE - PATCH.RTD - PATCH.RTP run PATCH.EXE from within C:\MASM611 copy H2INC.EXE and H2INC.ERR to C:\MASM611\BIN (overwrite the existing files) Install VC++ 1.52c: download it from: http://vetusware.com/download/Visual%20C%2B%2B%201.52c/?id=9008 unzip the MSVC15 folder to C:\ (you don't need to run setup) create environment variable LIB=C:\MSVC15\LIB add to path C:\MSVC15\BIN I used an Ubuntu machine to get the source files: git clone http://dev.laptop.org/git/geode-vsa If you've done everything right, then go in to the source build directory, and run: nmake all Let me know how you make/made out! -Jamie On 12/01/13 01:51, Quentin Bouteiller wrote: > Hi, > I am currently trying to compile Coreboot for my Wyse S30 (which is > pretty > identical to a Wyse S50, for those who have one) by following this > > > torial<http://fijam.eu.org/blog/how-to-put-coreboot-on-wyse-S30s50/>but > I have a major problem. > ...as it is said in the tutorial, "GX2 VSA > needs to be compiled with an antediluvian and esoteric toolchain from > sources that are almost nowhere to be found and embedded within the > coreboot image". And guess what? I am no able to get all the components > needed for the compilation...

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Re: [coreboot] coreboot engineer needed
by QingPei Wang Jan. 10, 2014

Jan. 10, 2014

On Fri, Jan 10, 2014 at 10:39 PM, Stojsavljevic, Zoran < zoran.stojsavljevic(a)intel.com> wrote: > Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk > does this require the candidate should be United States Residents ？ Best wishes QingPei Wang Phone: 86+18910893991

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coreboot engineer needed
by Scott Duplichan Jan. 10, 2014

Jan. 10, 2014

https://intel.taleo.net/careersection/10000/jobdetail.ftl?job=725464 Thanks, Scott

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Strange Coreboot behaviors while building IVB Cougar Canyon Coreboot based upon intel.com/fsp IVB FSP
by Stojsavljevic, Zoran Jan. 10, 2014

Jan. 10, 2014

Hello, After long time, I am returning to this domain, in attempt to build valid Coreboot using git clone from Coreboot.org . I have two instances I cloned, one is v4.0-4966, another one is latest (cloned today) v4.0-5223 ... Here is what I have while building v4.0-4966 (.config attached to the email as CONFIG_4966): coreboot.rom: 8192 kB, bootblocksize 864, romsize 8388608, offset 0x400000 alignment: 64 bytes Name Offset Type Size cmos_layout.bin 0x400000 cmos_layout 1164 pci8086,0166.rom 0x4004c0 optionrom 65536 cpu_microcode_blob.bin 0x410500 microcode 32832 <<===== YES, microcode integrated fallback/romstage 0x4185c0 stage 31082 fallback/coreboot_ram 0x41ff80 stage 75924 fallback/payload 0x432880 payload 55177 config 0x440080 raw 4322 (empty) 0x4411c0 null 3403224 fsp.bin 0x77ffc0 (unknown) 393216 (empty) 0x7e0000 null 130072 Needless to say, for some reason reset vector does not start (I see no serial outputs from FSP even)! Here is what I have while building v4.0-5223 (.config attached to the email as CONFIG_5223): coreboot.rom: 8192 kB, bootblocksize 992, romsize 8388608, offset 0x400000 alignment: 64 bytes Name Offset Type Size cmos_layout.bin 0x400000 cmos_layout 1164 pci8086,0166.rom 0x4004c0 optionrom 65536 fallback/romstage 0x410500 stage 31583 fallback/coreboot_ram 0x4180c0 stage 75182 fallback/payload 0x42a6c0 payload 55156 config 0x437e80 raw 4419 (empty) 0x439000 null 3370904 cpu_microcode_blob.bin 0x76ffc0 microcode 0 <<===== NO microcode!!! (empty) 0x770000 null 65432 fsp.bin 0x77ffc0 (unknown) 393216 (empty) 0x7e0000 null 129944 The same: reset vector does not go! Strange. Any clues? Thank you, Zoran _______ Most of The Time you should be "intel inside" to be capable to think "out of the box". Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052

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Re: [coreboot] a question about coreboot and Bochs emulator
by Gelip Jan. 10, 2014

Jan. 10, 2014

Hymm, I test other bios - Award in Bosch 2.6.2 emulator and working OK. In console window have this: ==================================================================================================== 00000000000i[MEM0 ] rom at 0xfffe0000/131072 ('C:\Program Files\Bochs-2.6.2/iwillBIOS-bochs-latest') ==================================================================================================== Link -> http://www.youtube.com/watch?v=5DVXTC7xe38

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Re: [coreboot] three errors found while compiling FILO (1 fix + 1
by Gelip Jan. 10, 2014

Jan. 10, 2014

Hi. I succeeded in going build a FILO 0.6.0 in this way: http://yohann.martineau.free.fr/blog.php?lang=fr&url=boot-coreboot--filo-an… only change svn to actual git coreboot link :-) ======================================================================== FILO 0.6.0, coreboot: 4.0-4772-ga4affe1-dirty root_dev = unset [ Minimal BASH-like line editing is supported. For the first word, TAB lists possible command completions.] filo> probe ata0 master [ATA DISK]: Maxtor 2F020J0 ATA-1: [io ports 0x170-0x177,0x376] * hdc [ATAPI CD-ROM]: OEM CD-ROM F563E ata1 master [ATAPI CDROM/DVD]: OEM CD-ROM F563E IDE channel 2 not found IDE channel 2 not found IDE channel 3 not found IDE channel 3 not found filo>

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Re: [coreboot] a question about coreboot and Bochs emulator
by Patrick Georgi Jan. 9, 2014

Jan. 9, 2014

Am 2014-01-10 02:22, schrieb behrouz khosravi: > I know that Qemu or Simnow are available for emulating a platform but > I like to test it Bochs. If I remember correctly, one issue is that bochs has its BIOS entry point at 0xf_fff0 (and maps the bios there, just below 1MB), while coreboot expects a more modern PC design with the flash below 4GB and the entry point at 0xffff_fff0. Patrick

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Re: [coreboot] a question about coreboot and Bochs emulator
by Scott Duplichan Jan. 9, 2014

Jan. 9, 2014

ron minnich [mailto:rminnich@gmail.com] wrote: ]A number of us used bochs years ago for coreboot debugging. IIRC it ]"just worked" when we tried it. ] ]ron I remember in 2008 when a guy named Kevin proposed changing the bochs bios from asm code to C code because the build environment for the asm version was next to impossible to setup. Others were skeptical about his proposal to use gcc for 16-bit x86 code generation, but it worked out OK. Today that C coded BIOS is the default coreboot payload. Though I have not used bochs for several years, I bet SeaBIOS would still work without too much trouble. But coreboot itself is a different story I imagine. Today, the DDR3 memory reference code used by AMD contains elaborate algorithms for receiver enable training, DQS read and write position training, etc. I think it takes a significant amount of memory controller emulation code to make the AMD DDR3 initialization pass. I imagine the situation is similar for Intel memory reference code. Same for HT and QPI. In 2004 I modified bochs enough to boot a production HP ProLiant DL145 BIOS (http://notabs.org/bochs/) That took some work, but the work mostly involved adding enough Opteron/AMD8111 PCI config space emulation to make the AMI BIOS happy. Memory initialization was relatively simple in those days. In 2004, bochs had no PCI config space emulation at all as far as I remember. AMD simnow has enough chipset and memory controller to boot an unmodified coreboot. The biggest limitation of AMD simnow is the public version doesn't support fusion and more recent processors. Intel can boot unmodified images using Simics, according to something I read a while back. But I don't think Intel has a public version of Simics. Thanks, Scott ]On Thu, Jan 9, 2014 at 5:22 PM, behrouz khosravi <bz.khosravi(a)gmail.com> wrote: ]> Hello every one. I have searched a lot on the Net to find my answer but ]> I didn't got any helpful results so I decided to use the mailing list. my ]> question is that has any body ported coreboot to Bochs emulator ]> successfully. ]> I know that Qemu or Simnow are available for emulating a platform but I like ]> to test it Bochs. ]> thanks

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Re: [coreboot] a question about coreboot and Bochs emulator
by ron minnich Jan. 9, 2014

Jan. 9, 2014

A number of us used bochs years ago for coreboot debugging. IIRC it "just worked" when we tried it. ron On Thu, Jan 9, 2014 at 5:22 PM, behrouz khosravi <bz.khosravi(a)gmail.com> wrote: > Hello every one. I have searched a lot on the Net to find my answer but > I didn't got any helpful results so I decided to use the mailing list. my > question is that has any body ported coreboot to Bochs emulator > successfully. > I know that Qemu or Simnow are available for emulating a platform but I like > to test it Bochs. > thanks > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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a question about coreboot and Bochs emulator
by behrouz khosravi Jan. 9, 2014

Jan. 9, 2014

Hello every one. I have searched a lot on the Net to find my answer but I didn't got any helpful results so I decided to use the mailing list. my question is that has any body ported coreboot to Bochs emulator successfully. I know that Qemu or Simnow are available for emulating a platform but I like to test it Bochs. thanks

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