coreboot October 2011

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Patch merged into coreboot/master: 3322f8f mptable: Refactor mptable generation some more
by gerrit＠coreboot.org 13 Oct '11

13 Oct '11

the following patch was just integrated into master: commit 3322f8f5a5ce35ecc5f03ca56f587f1b85b04e78 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 7 23:01:55 2011 +0200 mptable: Refactor mptable generation some more The last couple of lines of every mptable function were mostly identical. Refactor into common code, a new function mptable_finalize. Coccinelle script: @@ identifier mc; @@ ( -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc)); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); | -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); ) Change-Id: Ib2270d800bdd486c5eb49b328544d36bd2298c9e Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/246 for details. -gerrit

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Patch merged into coreboot/master: eae1696 mptable: Get rid of fixup_virtual_wire
by gerrit＠coreboot.org 13 Oct '11

13 Oct '11

the following patch was just integrated into master: commit eae1696809d6e6834d08ef22aa08c8f200870c59 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 7 22:41:07 2011 +0200 mptable: Get rid of fixup_virtual_wire As stated in some code files, fixup_virtual_wire was established to avoid touching 200 invocations of the mptable code. Let Coccinelle do it: @@ type T; identifier v; @@ -void fixup_virtual_wire(T v) -{ ... } @@ expression A; identifier v; @@ -v = smp_write_floating_table(A); +v = smp_write_floating_table(A, 0); @@ expression A; identifier v; @@ -v = smp_write_floating_table(A, 0); -fixup_virtual_wire(v); +v = smp_write_floating_table(A, 1); Change-Id: Icad8a063380bf4726be7cebb414d13b574112b14 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/245 for details. -gerrit

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Patch merged into coreboot/master: 51caef5 mptable: Refactor lintsrc generation
by gerrit＠coreboot.org 13 Oct '11

13 Oct '11

the following patch was just integrated into master: commit 51caef5bb69445b65f4d7e468abe06bdb95de7b9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 7 21:42:52 2011 +0200 mptable: Refactor lintsrc generation We copied pretty much the same code for generating mptable entries for local interrupts (with some notable exceptions). This change moves these lines into a generic function "mptable_lintsrc" and makes use of it in many places. The remaining uses of smp_write_lintsrc should be reviewed and replaced by mptable_lintsrc calls where possible, and smp_write_lintsrc made static. This patch was generated using Coccinelle: @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @m@ identifier mc; expression BUS; @@ -#define IO_LOCAL_INT(type, intr, apicid, pin) smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, BUS, (intr), (apicid), (pin)); ... -IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); -IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, BUS); Change-Id: I97421f820cd039f5fd753cb0da5c1cca68819bb4 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/244 for details. -gerrit

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Patch merged into coreboot/master: 8125150 Make Asus A8V-E SE better ACPI citizen.
by gerrit＠coreboot.org 13 Oct '11

13 Oct '11

the following patch was just integrated into master: commit 8125150119b0bcbf4ce588dc5c731365bbd362e4 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Wed Oct 12 22:11:40 2011 +0200 Make Asus A8V-E SE better ACPI citizen. Use the SSDT autogen infrastructure to support the automatic reserved resources, automatic P-state generation and automatic _CRS PCI0 method. Change-Id: Ic56a92eeb70a0a2a2d6de2507009ec3a832c83b3 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> See http://review.coreboot.org/251 for details. -gerrit

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Patch set updated for coreboot: 7b68d61 Update coreboot cross toolchain to gcc 4.6.1
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/250 -gerrit commit 7b68d61bfff591f5fdec7c63fc9af66cf7dd0c13 Author: Stefan Reinauer <reinauer(a)google.com> Date: Tue Oct 11 22:37:59 2011 -0700 Update coreboot cross toolchain to gcc 4.6.1 - Tested on Mac OS X 10.7.1 - Tested on Ubuntu 10.04 LTS (Lucid Lynx) Please test on Windows and other Linux distributions Change-Id: I132c01293fc0cff0cfb84556a93c0b8de8e57230 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- util/crossgcc/buildgcc | 76 ++++-- .../acpica-unix-20110922_unknown_warnings.patch | 19 ++ .../binutils-2.20_no-i386-svr4-asm-comments.patch | 10 - .../patches/binutils-2.21.1_no-bfd-doc.patch | 11 + .../patches/gcc-4.4.2_less-junk-in-crtbegin.patch | 50 ---- util/crossgcc/patches/gcc-4.5.1_pragma.patch | 10 - .../patches/mpfr-2.4.2_allpatches_20100308.patch | 266 -------------------- 7 files changed, 80 insertions(+), 362 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 6061f26..40444a5 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -20,8 +20,8 @@ # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA # -CROSSGCC_DATE="August 8th, 2011" -CROSSGCC_VERSION="1.04" +CROSSGCC_DATE="October 10th, 2011" +CROSSGCC_VERSION="1.05" # default settings TARGETDIR=`pwd`/xgcc @@ -29,17 +29,18 @@ TARGETARCH=i386-elf DESTDIR= # version numbers -GMP_VERSION=5.0.1 -MPFR_VERSION=3.0.0 -MPC_VERSION=0.8.2 +GMP_VERSION=5.0.2 +MPFR_VERSION=3.1.0 +MPC_VERSION=0.9 LIBELF_VERSION=0.8.13 -GCC_VERSION=4.5.2 -BINUTILS_VERSION=2.20.1 +GCC_VERSION=4.6.1 +GCC_AUTOCONF_VERSION=2.64 +BINUTILS_VERSION=2.21.1 GDB_VERSION=7.3.1 W32API_VERSION=3.17-2 W32API_VERSION_SHORT=3.17 MINGWRT_VERSION=3.18 -IASL_VERSION=20110623 +IASL_VERSION=20110922 # archive locations GMP_ARCHIVE="ftp://ftp.gmplib.org/pub/gmp-${GMP_VERSION}/gmp-${GMP_VERSION}.tar.bz2" @@ -146,7 +147,7 @@ GNU General Public License for more details. EOF } -printf "${blue}Welcome to the ${red}coresystems${blue} cross toolchain builder v$CROSSGCC_VERSION ($CROSSGCC_DATE)${NC}\n\n" +printf "${blue}Welcome to the ${red}coreboot${blue} cross toolchain builder v$CROSSGCC_VERSION ($CROSSGCC_DATE)${NC}\n\n" # Look if we have getopt. If not, build it. export PATH=$PATH:. @@ -198,14 +199,12 @@ if [ "$TARGETARCH" = "i386-mingw32" ]; then MINGW_ARCHIVES="$W32API_ARCHIVE $MINGWRT_ARCHIVE" fi -if [ ${GCC_VERSION} = "4.5.0" -o ${GCC_VERSION} = "4.6.0" ]; then - # coreboot does not like the GOLD linker - # USE_GOLD="--enable-gold" - USE_GOLD="" - GCC_OPTIONS="--enable-lto" -fi +# coreboot does not like the GOLD linker +# USE_GOLD="--enable-gold" +USE_GOLD="" +GCC_OPTIONS="--enable-lto" -if [ ${GCC_VERSION} = "4.6.0" ]; then +if [ ${GCC_VERSION} = "4.6.2" ]; then if [ ! -r tarballs/gcc-core-${GCC_VERSION}.tar.bz2 ]; then printf "Pre-Release GCC ${GCC_VERSION}, checking out subversion trunk\n" mkdir -p tarballs/.tmp @@ -273,6 +272,7 @@ if [ "$TARGETARCH" = "i386-mingw32" ]; then mv $MINGWRT_DIR/include/* $W32API_DIR/include/* $TARGETDIR/i386-mingw32/sys-include fi +CC=cc if [ `uname` = "Darwin" ]; then #GCC_OPTIONS="$GCC_OPTIONS --enable-threads=posix" @@ -286,13 +286,14 @@ if [ `uname` = "Darwin" ]; then else OPTIONS="ABI=32" fi - # old check: - #OPTIONS="ABI=32" - #touch .architecture_check.c - #gcc .architecture_check.c -c -o .architecture_check.o - #ARCH=`file .architecture_check.o |cut -f5 -d\ ` - #test "$ARCH" = "x86_64" && OPTIONS="ABI=64" - #rm .architecture_check.c .architecture_check.o + + # In Xcode 4 the default compiler was switched to gcc-llvm. + # However, this compiler fails to compile gcc 4.6.x. As a + # workaround it's possible to compile gcc with gcc-4.2 or + # clang. + if $CC -v 2>&1 | grep -q LLVM; then + CC=clang + fi fi mkdir -p build-gmp build-mpfr build-mpc build-libelf build-binutils build-gcc @@ -321,8 +322,10 @@ fi # ln -s $DESTDIR$TARGETDIR $TARGETDIR #fi -# Now set CFLAGS to match GMP CFLAGS. -HOSTCFLAGS=`grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2` +# Now set CFLAGS to match GMP CFLAGS but strip out -pedantic +# as GCC 4.6.x fails if it's there. +HOSTCFLAGS=`grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\ + sed s,-pedantic,,` if [ -f build-mpfr/.success ]; then printf "Skipping MPFR as it is already built\n" @@ -393,6 +396,12 @@ if [ -f build-binutils/.success ]; then else printf "Building binutils ${BINUTILS_VERSION} ... " ( + # What a pain: binutils don't come with configure + # script anymore. Create it: + cd binutils-${BINUTILS_VERSION}/ + autoconf + cd .. + # Now build binutils cd build-binutils rm -f .failed ../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR --target=${TARGETARCH} \ @@ -411,6 +420,19 @@ if [ -f build-gcc/.success ]; then else printf "Building GCC ${GCC_VERSION} ... " ( + # Even worse than binutils: GCC does not come with configure + # script anymore, but also enforces an obsolete autoconf version + # to create it. This is a poster child of how autotools help make + # software portable. + cd gcc-${GCC_VERSION} + sed '/dnl Ensure exactly this Autoconf version is used/d' \ + config/override.m4 > config/override.m4.new + autoconf_version=`autoconf -V | grep "autoconf" | tr ' ' '\n' | tail -1` + sed "s/${GCC_AUTOCONF_VERSION}/${autoconf_version}/g" \ + config/override.m4.new > config/override.m4 + autoconf + cd .. + # Now, finally, we can build gcc: cd build-gcc export PATH=$PATH:$DESTDIR$TARGETDIR/bin rm -f .failed @@ -419,10 +441,12 @@ printf "Building GCC ${GCC_VERSION} ... " # There's a work-around called CFLAGS_FOR_BUILD and CFLAGS_FOR_TARGET # but it does not seem to work properly. At least the host library # libiberty is not compiled with CFLAGS_FOR_BUILD. - CFLAGS_FOR_TARGET="-O2" CFLAGS="$HOSTCFLAGS" CFLAGS_FOR_BUILD="$HOSTCFLAGS" `readlink -f ../gcc-${GCC_VERSION}/configure` \ + CC="$CC" CFLAGS_FOR_TARGET="-O2" CFLAGS="$HOSTCFLAGS" \ + CFLAGS_FOR_BUILD="$HOSTCFLAGS" ../gcc-${GCC_VERSION}/configure \ --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \ --target=${TARGETARCH} --disable-werror --disable-shared \ --disable-libssp --disable-bootstrap --disable-nls \ + --disable-libquadmath \ $GCC_OPTIONS --enable-languages="c" $USE_GOLD \ --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \ --with-mpc=$DESTDIR$TARGETDIR --with-libelf=$DESTDIR$TARGETDIR \ diff --git a/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch b/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch new file mode 100644 index 0000000..f53be92 --- /dev/null +++ b/util/crossgcc/patches/acpica-unix-20110922_unknown_warnings.patch @@ -0,0 +1,19 @@ +--- acpica-unix-20110922/compiler/Makefile 2011-09-22 08:59:34.000000000 -0700 ++++ acpica-unix-20110922/compiler/Makefile 2011-10-11 23:47:29.000000000 -0700 +@@ -245,15 +245,11 @@ + -Waggregate-return \ + -Wchar-subscripts \ + -Wempty-body \ +- -Wlogical-op \ + -Wmissing-declarations \ + -Wmissing-field-initializers \ +- -Wmissing-parameter-type \ + -Wnested-externs \ +- -Wold-style-declaration \ + -Wold-style-definition \ +- -Wredundant-decls \ +- -Wtype-limits ++ -Wredundant-decls + + # + # Bison/Flex configuration diff --git a/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch b/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch deleted file mode 100644 index 3c0cef9..0000000 --- a/util/crossgcc/patches/binutils-2.20_no-i386-svr4-asm-comments.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- binutils-2.20/gas/config/tc-i386.c~ 2009-01-20 14:19:04.000000000 +0100 -+++ binutils-2.20/gas/config/tc-i386.c 2009-01-20 14:20:47.000000000 +0100 -@@ -318,6 +318,7 @@ - && !defined (TE_GNU) \ - && !defined (TE_LINUX) \ - && !defined (TE_NETWARE) \ -+ && 0 \ - && !defined (TE_FreeBSD) \ - && !defined (TE_NetBSD))) - /* This array holds the chars that always start a comment. If the diff --git a/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch b/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch new file mode 100644 index 0000000..4fb9e21 --- /dev/null +++ b/util/crossgcc/patches/binutils-2.21.1_no-bfd-doc.patch @@ -0,0 +1,11 @@ +--- binutils-2.21.1/bfd/Makefile.in 2011-06-27 01:57:12.000000000 -0700 ++++ binutils-2.21.1/bfd/Makefile.in 2011-10-11 21:59:15.000000000 -0700 +@@ -323,7 +323,7 @@ + RELEASE = y + INCDIR = $(srcdir)/../include + CSEARCH = -I. -I$(srcdir) -I$(INCDIR) +-SUBDIRS = doc po ++SUBDIRS = po + bfddocdir = doc + libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \ + @SHARED_LDFLAGS@ $(am__empty) diff --git a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch b/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch deleted file mode 100644 index a1c2480..0000000 --- a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- t/gcc-4.4.2/gcc/crtstuff.c Fr. Apr 10 01:23:07 2009 -+++ gcc-4.4.2/gcc/crtstuff.c Di. Jul 28 16:43:28 2009 -@@ -204,6 +204,7 @@ - = { (func_ptr) (-1) }; - #endif /* __DTOR_LIST__ alternatives */ - -+#if 0 - #ifdef USE_EH_FRAME_REGISTRY - /* Stick a label at the beginning of the frame unwind info so we can register - and deregister it with the exception handling library code. */ -@@ -219,6 +220,7 @@ - __attribute__ ((unused, section(JCR_SECTION_NAME), aligned(sizeof(void*)))) - = { }; - #endif /* JCR_SECTION_NAME */ -+#endif - - #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP) - -@@ -309,6 +311,7 @@ - } - #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */ - -+#if 0 - #ifdef USE_EH_FRAME_REGISTRY - #ifdef CRT_GET_RFIB_DATA - /* If we used the new __register_frame_info_bases interface, -@@ -320,6 +323,7 @@ - __deregister_frame_info (__EH_FRAME_BEGIN__); - #endif - #endif -+#endif - - completed = 1; - } -@@ -333,6 +337,7 @@ - = { __do_global_dtors_aux }; - #endif /* !defined(FINI_SECTION_ASM_OP) */ - -+#if 0 - #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME) - /* Stick a call to __register_frame_info into the .init section. For some - reason calls with no arguments work more reliably in .init, so stick the -@@ -364,6 +369,7 @@ - } - #endif /* JCR_SECTION_NAME */ - } -+#endif - - #ifdef INIT_SECTION_ASM_OP - CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy) diff --git a/util/crossgcc/patches/gcc-4.5.1_pragma.patch b/util/crossgcc/patches/gcc-4.5.1_pragma.patch deleted file mode 100644 index 36ac8f4..0000000 --- a/util/crossgcc/patches/gcc-4.5.1_pragma.patch +++ /dev/null @@ -1,10 +0,0 @@ -diff -ur gcc-4.5.1.orig/gcc/config/i386/i386elf.h gcc-4.5.1/gcc/config/i386/i386elf.h ---- gcc-4.5.1.orig/gcc/config/i386/i386elf.h 2010-11-17 19:48:16.184401200 -0700 -+++ gcc-4.5.1/gcc/config/i386/i386elf.h 2010-11-17 20:52:54.443969900 -0700 -@@ -123,3 +123,6 @@ - #undef ASM_OUTPUT_ALIGNED_BSS - #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ - asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) -+ -+/* Enable parsing of #pragma pack(push,<n>) and #pragma pack(pop). */ -+#define HANDLE_PRAGMA_PACK_PUSH_POP 1 diff --git a/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch b/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch deleted file mode 100644 index 6603337..0000000 --- a/util/crossgcc/patches/mpfr-2.4.2_allpatches_20100308.patch +++ /dev/null @@ -1,266 +0,0 @@ -diff -ur mpfr-2.4.2.orig/PATCHES mpfr-2.4.2/PATCHES ---- mpfr-2.4.2.orig/PATCHES 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/PATCHES 2010-03-08 22:28:53.000000000 +0100 -@@ -0,0 +1,3 @@ -+gmp5 -+longlong.h -+sin_cos_underflow -diff -ur mpfr-2.4.2.orig/VERSION mpfr-2.4.2/VERSION ---- mpfr-2.4.2.orig/VERSION 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/VERSION 2010-03-08 22:28:53.000000000 +0100 -@@ -1 +1 @@ --2.4.2 -+2.4.2-p3 -diff -ur mpfr-2.4.2.orig/configure mpfr-2.4.2/configure ---- mpfr-2.4.2.orig/configure 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/configure 2010-03-08 22:28:53.000000000 +0100 -@@ -20449,6 +20449,9 @@ - main () - { - -+#ifndef BITS_PER_MP_LIMB -+#define BITS_PER_MP_LIMB GMP_LIMB_BITS -+#endif - return BITS_PER_MP_LIMB == BYTES_PER_MP_LIMB * CHAR_BIT - && sizeof(mp_limb_t) == BYTES_PER_MP_LIMB ? 0 : 1; - -diff -ur mpfr-2.4.2.orig/configure.in mpfr-2.4.2/configure.in ---- mpfr-2.4.2.orig/configure.in 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/configure.in 2010-03-08 22:28:53.000000000 +0100 -@@ -424,6 +424,9 @@ - #include "gmp.h" - #include "gmp-impl.h" - ]], [[ -+#ifndef BITS_PER_MP_LIMB -+#define BITS_PER_MP_LIMB GMP_LIMB_BITS -+#endif - return BITS_PER_MP_LIMB == BYTES_PER_MP_LIMB * CHAR_BIT - && sizeof(mp_limb_t) == BYTES_PER_MP_LIMB ? 0 : 1; - ]])], [AC_MSG_RESULT(yes)], [ -diff -ur mpfr-2.4.2.orig/mpfr-impl.h mpfr-2.4.2/mpfr-impl.h ---- mpfr-2.4.2.orig/mpfr-impl.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr-impl.h 2010-03-08 22:28:53.000000000 +0100 -@@ -65,6 +65,12 @@ - # ifndef __GMP_IMPL_H__ - # include "gmp-impl.h" - # endif -+# ifndef BITS_PER_MP_LIMB -+# define BITS_PER_MP_LIMB GMP_LIMB_BITS -+# endif -+#ifndef mpn_sqr_n -+# define mpn_sqr_n mpn_sqr -+#endif - # ifdef MPFR_NEED_LONGLONG_H - # include "longlong.h" - # endif -diff -ur mpfr-2.4.2.orig/mpfr-longlong.h mpfr-2.4.2/mpfr-longlong.h ---- mpfr-2.4.2.orig/mpfr-longlong.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr-longlong.h 2010-03-08 22:28:53.000000000 +0100 -@@ -1011,7 +1011,15 @@ - #endif /* __m88000__ */ - - #if defined (__mips) && W_TYPE_SIZE == 32 --#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 -+#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ UDItype _r; \ -+ _r = (UDItype) u * v; \ -+ (w1) = _r >> 32; \ -+ (w0) = (USItype) _r; \ -+ } while (0) -+#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 - #define umul_ppmm(w1, w0, u, v) \ - __asm__ ("multu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) - #else -@@ -1024,7 +1032,16 @@ - #endif /* __mips */ - - #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64 --#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7 -+#if (__GNUC__ >= 5) || (__GNUC__ >= 4 && __GNUC_MINOR__ >= 4) -+typedef unsigned int UTItype __attribute__ ((mode (TI))); -+#define umul_ppmm(w1, w0, u, v) \ -+ do { \ -+ UTItype _r; \ -+ _r = (UTItype) u * v; \ -+ (w1) = _r >> 64; \ -+ (w0) = (UDItype) _r; \ -+ } while (0) -+#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 - #define umul_ppmm(w1, w0, u, v) \ - __asm__ ("dmultu %2,%3" : "=l" (w0), "=h" (w1) : "d" (u), "d" (v)) - #else -diff -ur mpfr-2.4.2.orig/mpfr.h mpfr-2.4.2/mpfr.h ---- mpfr-2.4.2.orig/mpfr.h 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/mpfr.h 2010-03-08 22:28:53.000000000 +0100 -@@ -27,7 +27,7 @@ - #define MPFR_VERSION_MAJOR 2 - #define MPFR_VERSION_MINOR 4 - #define MPFR_VERSION_PATCHLEVEL 2 --#define MPFR_VERSION_STRING "2.4.2" -+#define MPFR_VERSION_STRING "2.4.2-p3" - - /* Macros dealing with MPFR VERSION */ - #define MPFR_VERSION_NUM(a,b,c) (((a) << 16L) | ((b) << 8) | (c)) -diff -ur mpfr-2.4.2.orig/sin_cos.c mpfr-2.4.2/sin_cos.c ---- mpfr-2.4.2.orig/sin_cos.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/sin_cos.c 2010-03-08 22:28:53.000000000 +0100 -@@ -82,17 +82,19 @@ - if (y != x) - /* y and x differ, thus we can safely try to compute y first */ - { -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (y, x, -2 * expx, 2, 0, rnd_mode, -- { inexy = _inexact; -- goto small_input; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ y, x, -2 * expx, 2, 0, rnd_mode, -+ { inexy = _inexact; -+ goto small_input; }); - if (0) - { - small_input: - /* we can go here only if we can round sin(x) */ -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (z, __gmpfr_one, -2 * expx, -- 1, 0, rnd_mode, -- { inexz = _inexact; -- goto end; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ z, __gmpfr_one, -2 * expx, 1, 0, rnd_mode, -+ { inexz = _inexact; -+ MPFR_SAVE_EXPO_UPDATE_FLAGS (expo, __gmpfr_flags); -+ goto end; }); - } - - /* if we go here, one of the two MPFR_FAST_COMPUTE_IF_SMALL_INPUT -@@ -101,18 +103,19 @@ - else /* y and x are the same variable: try to compute z first, which - necessarily differs */ - { -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (z, __gmpfr_one, -2 * expx, -- 1, 0, rnd_mode, -- { inexz = _inexact; -- goto small_input2; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ z, __gmpfr_one, -2 * expx, 1, 0, rnd_mode, -+ { inexz = _inexact; -+ goto small_input2; }); - if (0) - { - small_input2: - /* we can go here only if we can round cos(x) */ -- MPFR_FAST_COMPUTE_IF_SMALL_INPUT (y, x, -2 * expx, 2, 0, -- rnd_mode, -- { inexy = _inexact; -- goto end; }); -+ MPFR_FAST_COMPUTE_IF_SMALL_INPUT ( -+ y, x, -2 * expx, 2, 0, rnd_mode, -+ { inexy = _inexact; -+ MPFR_SAVE_EXPO_UPDATE_FLAGS (expo, __gmpfr_flags); -+ goto end; }); - } - } - m += 2 * (-expx); -@@ -207,7 +210,6 @@ - mpfr_clear (xr); - - end: -- /* FIXME: update the underflow flag if need be. */ - MPFR_SAVE_EXPO_FREE (expo); - mpfr_check_range (y, inexy, rnd_mode); - mpfr_check_range (z, inexz, rnd_mode); -diff -ur mpfr-2.4.2.orig/tests/tsin_cos.c mpfr-2.4.2/tests/tsin_cos.c ---- mpfr-2.4.2.orig/tests/tsin_cos.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/tests/tsin_cos.c 2010-03-08 22:28:53.000000000 +0100 -@@ -382,23 +382,56 @@ - consistency (void) - { - mpfr_t x, s1, s2, c1, c2; -+ mp_exp_t emin, emax; - mp_rnd_t rnd; -+ unsigned int flags_sin, flags_cos, flags, flags_before, flags_ref; -+ int inex_sin, inex_cos, inex, inex_ref; - int i; - -+ emin = mpfr_get_emin (); -+ emax = mpfr_get_emax (); -+ - for (i = 0; i <= 10000; i++) - { - mpfr_init2 (x, MPFR_PREC_MIN + (randlimb () % 8)); - mpfr_inits2 (MPFR_PREC_MIN + (randlimb () % 8), s1, s2, c1, c2, - (mpfr_ptr) 0); -- tests_default_random (x, 256, -5, 50); -- rnd = RND_RAND (); -- mpfr_sin (s1, x, rnd); -- mpfr_cos (c1, x, rnd); -- mpfr_sin_cos (s2, c2, x, rnd); -- if (!(mpfr_equal_p (s1, s2) && mpfr_equal_p (c1, c2))) -+ if (i < 8 * GMP_RND_MAX) -+ { -+ int j = i / GMP_RND_MAX; -+ if (j & 1) -+ mpfr_set_emin (MPFR_EMIN_MIN); -+ mpfr_set_si (x, (j & 2) ? 1 : -1, GMP_RNDN); -+ mpfr_set_exp (x, mpfr_get_emin ()); -+ rnd = (mpfr_rnd_t) (i % GMP_RND_MAX); -+ flags_before = 0; -+ if (j & 4) -+ mpfr_set_emax (-17); -+ } -+ else -+ { -+ tests_default_random (x, 256, -5, 50); -+ rnd = RND_RAND (); -+ flags_before = (randlimb () & 1) ? -+ (unsigned int) (MPFR_FLAGS_ALL ^ MPFR_FLAGS_ERANGE) : -+ (unsigned int) 0; -+ } -+ __gmpfr_flags = flags_before; -+ inex_sin = mpfr_sin (s1, x, rnd); -+ flags_sin = __gmpfr_flags; -+ __gmpfr_flags = flags_before; -+ inex_cos = mpfr_cos (c1, x, rnd); -+ flags_cos = __gmpfr_flags; -+ __gmpfr_flags = flags_before; -+ inex = !!mpfr_sin_cos (s2, c2, x, rnd); -+ flags = __gmpfr_flags; -+ inex_ref = inex_sin || inex_cos; -+ flags_ref = flags_sin | flags_cos; -+ if (!(mpfr_equal_p (s1, s2) && mpfr_equal_p (c1, c2)) || -+ inex != inex_ref || flags != flags_ref) - { -- printf ("mpfr_sin_cos and mpfr_sin/mpfr_cos disagree on %s,\nx = ", -- mpfr_print_rnd_mode (rnd)); -+ printf ("mpfr_sin_cos and mpfr_sin/mpfr_cos disagree on %s," -+ " i = %d\nx = ", mpfr_print_rnd_mode (rnd), i); - mpfr_dump (x); - printf ("s1 = "); - mpfr_dump (s1); -@@ -408,9 +441,16 @@ - mpfr_dump (c1); - printf ("c2 = "); - mpfr_dump (c2); -+ printf ("inex_sin = %d, inex_cos = %d, inex = %d (expected %d)\n", -+ inex_sin, inex_cos, inex, inex_ref); -+ printf ("flags_sin = 0x%x, flags_cos = 0x%x, " -+ "flags = 0x%x (expected 0x%x)\n", -+ flags_sin, flags_cos, flags, flags_ref); - exit (1); - } - mpfr_clears (x, s1, s2, c1, c2, (mpfr_ptr) 0); -+ mpfr_set_emin (emin); -+ mpfr_set_emax (emax); - } - } - -diff -ur mpfr-2.4.2.orig/version.c mpfr-2.4.2/version.c ---- mpfr-2.4.2.orig/version.c 2010-03-08 22:28:46.000000000 +0100 -+++ mpfr-2.4.2/version.c 2010-03-08 22:28:53.000000000 +0100 -@@ -25,5 +25,5 @@ - const char * - mpfr_get_version (void) - { -- return "2.4.2"; -+ return "2.4.2-p3"; - }

1 0

New patch to review for coreboot: 6b15b74 Extend coreboot table entry for serial ports
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/261 -gerrit commit 6b15b744b316b88f2affec952aaa8e5732007fa1 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 22 16:39:19 2011 -0700 Extend coreboot table entry for serial ports Add information about memory mapped/io mapped base addresses. and fix up libpayload to use the same structures Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb --- payloads/libpayload/arch/i386/coreboot.c | 4 +++- payloads/libpayload/arch/powerpc/coreboot.c | 4 +++- payloads/libpayload/include/coreboot_tables.h | 16 ++++++++++++---- src/arch/x86/boot/coreboot_table.c | 15 +++++++++++++-- src/console/uart8250mem_console.c | 5 +++++ src/include/boot/coreboot_tables.h | 5 ++++- src/include/uart8250.h | 1 + 7 files changed, 41 insertions(+), 9 deletions(-) diff --git a/payloads/libpayload/arch/i386/coreboot.c b/payloads/libpayload/arch/i386/coreboot.c index e3c944d..bdef4e8 100644 --- a/payloads/libpayload/arch/i386/coreboot.c +++ b/payloads/libpayload/arch/i386/coreboot.c @@ -77,7 +77,9 @@ static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info) static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info) { struct cb_serial *ser = (struct cb_serial *)ptr; - info->ser_ioport = ser->ioport; + if (ser->type != CB_SERIAL_TYPE_IO_MAPPED) + return; + info->ser_ioport = ser->baseaddr; } #ifdef CONFIG_NVRAM diff --git a/payloads/libpayload/arch/powerpc/coreboot.c b/payloads/libpayload/arch/powerpc/coreboot.c index ee1842c..7da87ed 100644 --- a/payloads/libpayload/arch/powerpc/coreboot.c +++ b/payloads/libpayload/arch/powerpc/coreboot.c @@ -77,7 +77,9 @@ static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info) static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info) { struct cb_serial *ser = (struct cb_serial *)ptr; - info->ser_ioport = ser->ioport; + if (ser->type != CB_SERIAL_TYPE_IO_MAPPED) + return; + info->ser_ioport = ser->baseaddr; } #ifdef CONFIG_NVRAM diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index c4dc115..d342c99 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -60,9 +60,13 @@ struct cb_memory_range { u32 type; }; -#define CB_MEM_RAM 1 -#define CB_MEM_RESERVED 2 -#define CB_MEM_TABLE 16 +#define CB_MEM_RAM 1 +#define CB_MEM_RESERVED 2 +#define CB_MEM_ACPI 3 +#define CB_MEM_NVS 4 +#define CB_MEM_UNUSABLE 5 +#define CB_MEM_VENDOR_RSVD 6 +#define CB_MEM_TABLE 16 struct cb_memory { u32 tag; @@ -110,7 +114,11 @@ struct cb_string { struct cb_serial { u32 tag; u32 size; - u16 ioport; +#define CB_SERIAL_TYPE_IO_MAPPED 1 +#define CB_SERIAL_TYPE_MEMORY_MAPPED 2 + u32 type; + u32 baseaddr; + u32 baud; }; #define CB_TAG_CONSOLE 0x00010 diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index cdfc0c1..78ff97d 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -112,7 +112,19 @@ static struct lb_serial *lb_serial(struct lb_header *header) serial = (struct lb_serial *)rec; serial->tag = LB_TAG_SERIAL; serial->size = sizeof(*serial); - serial->ioport = CONFIG_TTYS0_BASE; + serial->type = LB_SERIAL_TYPE_IO_MAPPED; + serial->baseaddr = CONFIG_TTYS0_BASE; + serial->baud = CONFIG_TTYS0_BAUD; + return serial; +#elif CONFIG_CONSOLE_SERIAL8250MEM + struct lb_record *rec; + struct lb_serial *serial; + rec = lb_new_record(header); + serial = (struct lb_serial *)rec; + serial->tag = LB_TAG_SERIAL; + serial->size = sizeof(*serial); + serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial->baseaddr = uartmem_getbaseaddr(); serial->baud = CONFIG_TTYS0_BAUD; return serial; #else @@ -131,7 +143,6 @@ static void add_console(struct lb_header *header, u16 consoletype) console->size = sizeof(*console); console->type = consoletype; } - #endif static void lb_console(struct lb_header *header) diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index e622ad0..923df99 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -28,6 +28,11 @@ static void uartmem_init(void) uart_bar = uart_mem_init(); } +u32 uartmem_getbaseaddr(void) +{ + return uart_bar; +} + static void uartmem_tx_byte(unsigned char data) { if (!uart_bar) diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 983b03f..45ba3af 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -146,7 +146,10 @@ struct lb_string { struct lb_serial { uint32_t tag; uint32_t size; - uint16_t ioport; +#define LB_SERIAL_TYPE_IO_MAPPED 1 +#define LB_SERIAL_TYPE_MEMORY_MAPPED 2 + uint32_t type; + uint32_t baseaddr; uint32_t baud; }; diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 4a02179..3c8ea09 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -146,6 +146,7 @@ void uart8250_mem_tx_byte(unsigned base_port, unsigned char data); void uart8250_mem_tx_flush(unsigned base_port); void uart8250_mem_init(unsigned base_port, unsigned divisor); u32 uart_mem_init(void); +u32 uartmem_getbaseaddr(void); /* and special init for OXPCIe based cards */ void oxford_init(void);

1 0

New patch to review for coreboot: 9570367 Prevent build breakage without consoles enabled
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/260 -gerrit commit 957036708c6ce1396fc1ebbf33e3e3a01af09bc7 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 1 14:04:50 2011 -0700 Prevent build breakage without consoles enabled If all console types are disabled, coreboot will fail to compile because static code is unused. This patch fixes the issue. Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: Ie9c8bf2a78e3aeba4c2908b06bc03f0f5af37db2 --- src/arch/x86/boot/coreboot_table.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c index d53a23a..cdfc0c1 100644 --- a/src/arch/x86/boot/coreboot_table.c +++ b/src/arch/x86/boot/coreboot_table.c @@ -120,6 +120,8 @@ static struct lb_serial *lb_serial(struct lb_header *header) #endif } +#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \ + CONFIG_CONSOLE_LOGBUF || CONFIG_USBDEBUG static void add_console(struct lb_header *header, u16 consoletype) { struct lb_console *console; @@ -130,6 +132,8 @@ static void add_console(struct lb_header *header, u16 consoletype) console->type = consoletype; } +#endif + static void lb_console(struct lb_header *header) { #if CONFIG_CONSOLE_SERIAL8250

1 0

New patch to review for coreboot: 7f8e685 Load an IDT with NULL limit
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/259 -gerrit commit 7f8e685996f65f2c67d1113fcfaab33ccc385da7 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jun 1 14:01:46 2011 -0700 Load an IDT with NULL limit Load an IDT with NULL limit to prevent the 16bit IDT being used in protected mode before c_start.S sets up a 32bit IDT when entering ram stage. Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: I8d048c894c863ac4971fcef8f065be6b899e1d3e --- src/cpu/x86/16bit/entry16.inc | 15 ++++++++++++++- src/cpu/x86/16bit/entry16.lds | 1 + 2 files changed, 15 insertions(+), 1 deletions(-) diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 1eb92c8..9f4c0e3 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -45,7 +45,6 @@ _start: xorl %eax, %eax movl %eax, %cr3 /* Invalidate TLB*/ - /* Invalidating the cache here seems to be a bad idea on * modern processors. Don't. * If we are hyperthreaded or we have multiple cores it is bad, @@ -55,6 +54,13 @@ _start: * entry16.inc. */ + /* Load an IDT with NULL limit to prevent the 16bit IDT being used + * in protected mode before c_start.S sets up a 32bit IDT when entering + * ram stage. + */ + movw $nullidt_offset, %bx + lidt %cs:(%bx) + /* Note: gas handles memory addresses in 16 bit code very poorly. * In particular it doesn't appear to have a directive allowing you * associate a section or even an absolute offset with a segment register. @@ -118,6 +124,13 @@ gdtptr16: .word gdt_end - gdt -1 /* compute the table limit */ .long gdt /* we know the offset */ +.align 4 +.globl nullidt +nullidt: + .word 0 /* limit */ + .long 0 + .word 0 + .globl _estart _estart: .code32 diff --git a/src/cpu/x86/16bit/entry16.lds b/src/cpu/x86/16bit/entry16.lds index 0580f0e..112d429 100644 --- a/src/cpu/x86/16bit/entry16.lds +++ b/src/cpu/x86/16bit/entry16.lds @@ -1 +1,2 @@ gdtptr16_offset = gdtptr16 & 0xffff; + nullidt_offset = nullidt & 0xffff;

1 0

New patch to review for coreboot: b043841 Fix compilation of x86emu with gcc 4.6.x
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/258 -gerrit commit b0438411e379d3fa1e3e7f43963138eb2d46a2fd Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Tue Oct 4 10:34:37 2011 -0700 Fix compilation of x86emu with gcc 4.6.x gcc 4.6 complains about unused but set variables in x86emu. Particularly some variables are always set but only used in debug mode, or when FPU support is enabled. Change-Id: Ic53bd2303171ab717eb2d2c0ed72744d3eb6989e Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/devices/oprom/x86emu/debug.h | 6 ++++++ src/devices/oprom/x86emu/fpu.c | 32 +++++++++++++++++++------------- src/devices/oprom/x86emu/ops.c | 8 ++++---- src/devices/oprom/x86emu/ops2.c | 2 +- 4 files changed, 30 insertions(+), 18 deletions(-) diff --git a/src/devices/oprom/x86emu/debug.h b/src/devices/oprom/x86emu/debug.h index ba180ba..1b2c3a3 100644 --- a/src/devices/oprom/x86emu/debug.h +++ b/src/devices/oprom/x86emu/debug.h @@ -198,6 +198,12 @@ #define DB(x) #endif +#ifdef DEBUG +#define X86EMU_DEBUG_ONLY(x) x +#else +#define X86EMU_DEBUG_ONLY(x) X86EMU_UNUSED(x) +#endif + /*-------------------------- Function Prototypes --------------------------*/ #ifdef __cplusplus diff --git a/src/devices/oprom/x86emu/fpu.c b/src/devices/oprom/x86emu/fpu.c index daa2ffa..7edebd4 100644 --- a/src/devices/oprom/x86emu/fpu.c +++ b/src/devices/oprom/x86emu/fpu.c @@ -50,6 +50,12 @@ void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } +#ifdef X86EMU_FPU_PRESENT +#define X86EMU_FPU_ONLY(x) x +#else +#define X86EMU_FPU_ONLY(x) X86EMU_UNUSED(x) +#endif + #ifdef DEBUG static const char *x86emu_fpu_op_d9_tab[] = { @@ -95,8 +101,8 @@ static const char *x86emu_fpu_op_d9_tab1[] = { void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -322,8 +328,8 @@ static const char *x86emu_fpu_op_da_tab[] = { void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -403,7 +409,7 @@ static const char *x86emu_fpu_op_db_tab[] = { void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; + uint X86EMU_FPU_ONLY(destoffset); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -530,8 +536,8 @@ static const char *x86emu_fpu_op_dc_tab[] = { void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -640,8 +646,8 @@ static const char *x86emu_fpu_op_dd_tab[] = { void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -747,8 +753,8 @@ static const char *x86emu_fpu_op_de_tab[] = void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); @@ -866,8 +872,8 @@ static const char *x86emu_fpu_op_df_tab[] = { void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1)) { int mod, rl, rh; - uint destoffset; - u8 stkelem; + uint X86EMU_FPU_ONLY(destoffset); + u8 X86EMU_FPU_ONLY(stkelem); START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); diff --git a/src/devices/oprom/x86emu/ops.c b/src/devices/oprom/x86emu/ops.c index c66da95..70e048d 100644 --- a/src/devices/oprom/x86emu/ops.c +++ b/src/devices/oprom/x86emu/ops.c @@ -3562,7 +3562,7 @@ Handles opcode 0xcc ****************************************************************************/ static void x86emuOp_int3(u8 X86EMU_UNUSED(op1)) { - u16 tmp; + u16 X86EMU_UNUSED(tmp); START_OF_INSTR(); DECODE_PRINTF("INT 3\n"); @@ -3590,7 +3590,7 @@ Handles opcode 0xcd ****************************************************************************/ static void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1)) { - u16 tmp; + u16 X86EMU_UNUSED(tmp); u8 intnum; START_OF_INSTR(); @@ -3620,7 +3620,7 @@ Handles opcode 0xce ****************************************************************************/ static void x86emuOp_into(u8 X86EMU_UNUSED(op1)) { - u16 tmp; + u16 X86EMU_UNUSED(tmp); START_OF_INSTR(); DECODE_PRINTF("INTO\n"); @@ -4034,7 +4034,7 @@ Handles opcode 0xd5 ****************************************************************************/ static void x86emuOp_aad(u8 X86EMU_UNUSED(op1)) { - u8 a; + u8 X86EMU_UNUSED(a); START_OF_INSTR(); DECODE_PRINTF("AAD\n"); diff --git a/src/devices/oprom/x86emu/ops2.c b/src/devices/oprom/x86emu/ops2.c index 349a664..f559874 100644 --- a/src/devices/oprom/x86emu/ops2.c +++ b/src/devices/oprom/x86emu/ops2.c @@ -336,7 +336,7 @@ static void x86emuOp2_set_byte(u8 op2) int mod, rl, rh; uint destoffset; u8 *destreg; - const char *name = 0; + const char *X86EMU_DEBUG_ONLY(name) = 0; int cond = 0; START_OF_INSTR();

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New patch to review for coreboot: 6faf97c Fix native x86 option rom initialization
by Stefan Reinauer 13 Oct '11

13 Oct '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/257 -gerrit commit 6faf97c0c1a10c44fbfebcd25d8b93967263fdfd Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Oct 12 14:35:54 2011 -0700 Fix native x86 option rom initialization - Intel option roms want an initialized i8259 or they will throw an exception 6. This should be done in the southbridge code, but that is executed much later than the VGA init, so initialize the i8259 in src/devices/oprom/x86.c. In the long run this will allow getting rid of some of the ugly hacks in some AMD boards' romstage.c - Don't overwrite the mode when copying mode info information back from 0x600. Change-Id: Idb01f13dbcd736d8d830b222ffe1ea85799fcd9c Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/devices/oprom/x86.c | 25 ++++++++++++++----------- 1 files changed, 14 insertions(+), 11 deletions(-) diff --git a/src/devices/oprom/x86.c b/src/devices/oprom/x86.c index 22fc2c5..4d7357c 100644 --- a/src/devices/oprom/x86.c +++ b/src/devices/oprom/x86.c @@ -27,6 +27,7 @@ #include <arch/interrupt.h> #include <cbfs.h> #include <delay.h> +#include <pc80/i8259.h> #include "x86.h" #include "vbe.h" #include "../../src/lib/jpeg.h" @@ -70,14 +71,9 @@ static int intXX_exception_handler(struct eregs *regs) { printk(BIOS_INFO, "Oops, exception %d while executing option rom\n", regs->vector); -#if 0 - // Odd: The i945GM VGA oprom chokes on a pushl %eax and will - // die with an exception #6 if we run the coreboot exception - // handler. Just continue, as it executes fine. x86_exception(regs); // Call coreboot exception handler -#endif - return 0; // Never returns? + return 0; // Never really returns } static int intXX_unknown_handler(struct eregs *regs) @@ -186,17 +182,20 @@ static void setup_realmode_idt(void) #if CONFIG_FRAMEBUFFER_SET_VESA_MODE static u8 vbe_get_mode_info(vbe_mode_info_t * mode_info) { + printk(BIOS_DEBUG, "Getting information about VESA mode %04x\n", + mode_info->video_mode); char *buffer = (char *)&__buffer; u16 buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00; u16 buffer_adr = ((unsigned long)buffer) & 0xffff; realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000, mode_info->video_mode, 0x0000, buffer_seg, buffer_adr); - memcpy(mode_info, buffer, sizeof(vbe_mode_info_t)); + memcpy(mode_info->mode_info_block, buffer, sizeof(vbe_mode_info_t)); return 0; } static u8 vbe_set_mode(vbe_mode_info_t * mode_info) { + printk(BIOS_DEBUG, "Setting VESA mode %04x\n", mode_info->video_mode); // request linear framebuffer mode mode_info->video_mode |= (1 << 14); // request clearing of framebuffer @@ -216,9 +215,8 @@ void vbe_set_graphics(void) mode_info.video_mode = (1 << 14) | CONFIG_FRAMEBUFFER_VESA_MODE; vbe_get_mode_info(&mode_info); unsigned char *framebuffer = - (unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr); + (unsigned char *)mode_info.vesa.phys_base_ptr; printk(BIOS_DEBUG, "framebuffer: %p\n", framebuffer); - printk(BIOS_DEBUG, "framebuffer: %x\n", mode_info.vesa.phys_base_ptr); vbe_set_mode(&mode_info); #if CONFIG_BOOTSPLASH struct jpeg_decdata *decdata; @@ -242,8 +240,7 @@ void vbe_textmode_console(void) void fill_lb_framebuffer(struct lb_framebuffer *framebuffer) { - framebuffer->physical_address = - le32_to_cpu(mode_info.vesa.phys_base_ptr); + framebuffer->physical_address = mode_info.vesa.phys_base_ptr; framebuffer->x_resolution = le16_to_cpu(mode_info.vesa.x_resolution); framebuffer->y_resolution = le16_to_cpu(mode_info.vesa.y_resolution); @@ -269,6 +266,12 @@ void run_bios(struct device *dev, unsigned long addr) { u32 num_dev = (dev->bus->secondary << 8) | dev->path.pci.devfn; + /* Setting up required hardware. + * Removing this will cause random illegal instruction exceptions + * in some option roms. + */ + setup_i8259(); + /* Set up BIOS Data Area */ setup_bda();

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coreboot October 2011