coreboot October 2009

coreboot@coreboot.org

63 participants
534 discussions

kconfig options
by Uwe Hermann 17 Oct '09

17 Oct '09

On Sat, Oct 17, 2009 at 03:25:07PM +0200, svn(a)coreboot.org wrote: > Remove CONFIG_ from #defines that aren't config variables. Trivial. Why this? Shouldn't they have been added to src/Kconfig (for example) instead? > Modified: trunk/coreboot-v2/src/arch/i386/init/car.S > =================================================================== > --- trunk/coreboot-v2/src/arch/i386/init/car.S 2009-10-17 03:00:04 UTC (rev 4801) > +++ trunk/coreboot-v2/src/arch/i386/init/car.S 2009-10-17 13:25:07 UTC (rev 4802) > @@ -269,7 +269,7 @@ > > > /* TODO: make this a config variable */ > -#if CONFIG_CARTEST > +#if CARTEST This one, for example, should likely be an option in the "Debugging" menu, maybe only visible if EXPERT is enabled (will post EXPERT patch soon). I personally think that _all_ options should be kconfig options (i.e. listed in a Kconfig file with some default). Whether or not they should also be visible in menuconfig is another issue and depends on the option, though. Uwe. -- http://www.hermann-uwe.de | http://www.randomprojects.org http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 2

build service results for r4802
by coreboot information 17 Oct '09

17 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "myles" checked in revision 4802 to the coreboot repository. This caused the following changes: Change Log: Remove CONFIG_ from #defines that aren't config variables. Trivial. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4802&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4802&device=msm800sev&vend… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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LED Postcode on Mainboard
by Crankyadmin 17 Oct '09

17 Oct '09

Hi all, Are these unique to the mainboard or are they generic of the bios in this case Coreboot? I have a build of coreboot that builds and then displays a few numbers and bombs out on FF. Does anybody know that FF is stands for? Mainboard: Sun Workstation Ultra 20 M2 (Tyan made maybe) Chipset: MCP55

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[v2] r4802 - in trunk/coreboot-v2/src: arch/i386/init cpu/intel/model_6ex cpu/intel/model_6fx cpu/ppc/ppc4xx cpu/via/car drivers/ati/ragexl drivers/emulation/qemu include/cpu/x86 mainboard/tyan/s2735 mainboard/via/vt8454c
by svn＠coreboot.org 17 Oct '09

17 Oct '09

Author: myles Date: 2009-10-17 15:25:07 +0200 (Sat, 17 Oct 2009) New Revision: 4802 Modified: trunk/coreboot-v2/src/arch/i386/init/car.S trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram_disable.c trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram_disable.c trunk/coreboot-v2/src/cpu/ppc/ppc4xx/sdram.c trunk/coreboot-v2/src/cpu/via/car/cache_as_ram.inc trunk/coreboot-v2/src/drivers/ati/ragexl/atyfb.h trunk/coreboot-v2/src/drivers/ati/ragexl/fbcon.h trunk/coreboot-v2/src/drivers/emulation/qemu/fbcon.h trunk/coreboot-v2/src/include/cpu/x86/lapic.h trunk/coreboot-v2/src/mainboard/tyan/s2735/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/via/vt8454c/auto.c Log: Remove CONFIG_ from #defines that aren't config variables. Trivial. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/src/arch/i386/init/car.S =================================================================== --- trunk/coreboot-v2/src/arch/i386/init/car.S 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/arch/i386/init/car.S 2009-10-17 13:25:07 UTC (rev 4802) @@ -269,7 +269,7 @@ /* TODO: make this a config variable */ -#if CONFIG_CARTEST +#if CARTEST /* check the cache as ram */ movl $CacheBase, %esi movl $(CacheSize>>2), %ecx Modified: trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram_disable.c =================================================================== --- trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram_disable.c 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram_disable.c 2009-10-17 13:25:07 UTC (rev 4802) @@ -102,9 +102,9 @@ :"=a" (new_cpu_reset) ); -#ifdef CONFIG_DEACTIVATE_CAR +#ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); -#include CONFIG_DEACTIVATE_CAR_FILE +#include DEACTIVATE_CAR_FILE print_debug(" - Done.\r\n"); #endif /* Copy and execute coreboot_ram */ Modified: trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram_disable.c =================================================================== --- trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram_disable.c 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram_disable.c 2009-10-17 13:25:07 UTC (rev 4802) @@ -102,9 +102,9 @@ :"=a" (new_cpu_reset) ); -#ifdef CONFIG_DEACTIVATE_CAR +#ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); -#include CONFIG_DEACTIVATE_CAR_FILE +#include DEACTIVATE_CAR_FILE print_debug(" - Done.\r\n"); #endif /* Copy and execute coreboot_ram */ Modified: trunk/coreboot-v2/src/cpu/ppc/ppc4xx/sdram.c =================================================================== --- trunk/coreboot-v2/src/cpu/ppc/ppc4xx/sdram.c 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/cpu/ppc/ppc4xx/sdram.c 2009-10-17 13:25:07 UTC (rev 4802) @@ -28,8 +28,8 @@ #include <clock.h> #include <stdint.h> -#define CONFIG_SDRAM_BANK0 -#ifdef CONFIG_SDRAM_BANK0 +#define CONFIGURE_SDRAM_BANK0 +#ifdef CONFIGURE_SDRAM_BANK0 /* * According to the PPC405GPr Users Manual, only non-reserved @@ -130,4 +130,4 @@ udelay(10000); } -#endif /* CONFIG_SDRAM_BANK0 */ +#endif /* CONFIGURE_SDRAM_BANK0 */ Modified: trunk/coreboot-v2/src/cpu/via/car/cache_as_ram.inc =================================================================== --- trunk/coreboot-v2/src/cpu/via/car/cache_as_ram.inc 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/cpu/via/car/cache_as_ram.inc 2009-10-17 13:25:07 UTC (rev 4802) @@ -131,7 +131,7 @@ movl $(CacheBase+CacheSize-4), %eax movl %eax, %esp -#ifdef CONFIG_CARTEST +#ifdef CARTEST testok: movb $0x40,%al outb %al, $0x80 xorl %edx, %edx Modified: trunk/coreboot-v2/src/drivers/ati/ragexl/atyfb.h =================================================================== --- trunk/coreboot-v2/src/drivers/ati/ragexl/atyfb.h 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/drivers/ati/ragexl/atyfb.h 2009-10-17 13:25:07 UTC (rev 4802) @@ -223,7 +223,7 @@ if (regindex >= 0x400) regindex -= 0x800; -#ifdef CONFIG_ATARI +#ifdef ATARI return in_le32((volatile u32 *)(info->ati_regbase+regindex)); #else return readl (info->ati_regbase + regindex); @@ -237,7 +237,7 @@ if (regindex >= 0x400) regindex -= 0x800; -#ifdef CONFIG_ATARI +#ifdef ATARI out_le32 (info->ati_regbase+regindex, val); #else writel (val, info->ati_regbase + regindex); @@ -279,7 +279,7 @@ if (regindex >= 0x400) regindex -= 0x800; -#ifdef CONFIG_ATARI +#ifdef ATARI return in_8 (info->ati_regbase + regindex); #else return readb (info->ati_regbase + regindex); @@ -293,7 +293,7 @@ if (regindex >= 0x400) regindex -= 0x800; -#ifdef CONFIG_ATARI +#ifdef ATARI out_8 (info->ati_regbase + regindex, val); #else writeb (val, info->ati_regbase + regindex); Modified: trunk/coreboot-v2/src/drivers/ati/ragexl/fbcon.h =================================================================== --- trunk/coreboot-v2/src/drivers/ati/ragexl/fbcon.h 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/drivers/ati/ragexl/fbcon.h 2009-10-17 13:25:07 UTC (rev 4802) @@ -65,7 +65,7 @@ #define fontheight(p) ((p)->_fontheight) #define fontheightlog(p) ((p)->_fontheightlog) -#ifdef CONFIG_FBCON_FONTWIDTH8_ONLY +#ifdef FBCON_FONTWIDTH8_ONLY /* fontwidth w is supported by dispsw */ #define FONTWIDTH(w) (1 << ((8) - 1)) Modified: trunk/coreboot-v2/src/drivers/emulation/qemu/fbcon.h =================================================================== --- trunk/coreboot-v2/src/drivers/emulation/qemu/fbcon.h 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/drivers/emulation/qemu/fbcon.h 2009-10-17 13:25:07 UTC (rev 4802) @@ -65,7 +65,7 @@ #define fontheight(p) ((p)->_fontheight) #define fontheightlog(p) ((p)->_fontheightlog) -#ifdef CONFIG_FBCON_FONTWIDTH8_ONLY +#ifdef FBCON_FONTWIDTH8_ONLY /* fontwidth w is supported by dispsw */ #define FONTWIDTH(w) (1 << ((8) - 1)) Modified: trunk/coreboot-v2/src/include/cpu/x86/lapic.h =================================================================== --- trunk/coreboot-v2/src/include/cpu/x86/lapic.h 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/include/cpu/x86/lapic.h 2009-10-17 13:25:07 UTC (rev 4802) @@ -112,7 +112,7 @@ } -#ifdef CONFIG_X86_GOOD_APIC +#ifdef X86_GOOD_APIC # define FORCE_READ_AROUND_WRITE 0 # define lapic_read_around(x) lapic_read(x) # define lapic_write_around(x,y) lapic_write((x),(y)) Modified: trunk/coreboot-v2/src/mainboard/tyan/s2735/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2735/cache_as_ram_auto.c 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/mainboard/tyan/s2735/cache_as_ram_auto.c 2009-10-17 13:25:07 UTC (rev 4802) @@ -256,9 +256,9 @@ print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\r\n"); #endif -#ifdef CONFIG_DEACTIVATE_CAR +#ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); -#include CONFIG_DEACTIVATE_CAR_FILE +#include DEACTIVATE_CAR_FILE print_debug(" - Done.\r\n"); #endif /*copy and execute coreboot_ram */ Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/auto.c 2009-10-17 03:00:04 UTC (rev 4801) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/auto.c 2009-10-17 13:25:07 UTC (rev 4802) @@ -35,8 +35,8 @@ #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" -#define CONFIG_DEACTIVATE_CAR 1 -#define CONFIG_DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c" +#define DEACTIVATE_CAR 1 +#define DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c" #include "cpu/x86/car/copy_and_run.c" #include "pc80/udelay_io.c" #include "lib/delay.c" @@ -120,9 +120,9 @@ enable_shadow_ram(cx700); sdram_enable(cx700); -#ifdef CONFIG_DEACTIVATE_CAR +#ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); -#include CONFIG_DEACTIVATE_CAR_FILE +#include DEACTIVATE_CAR_FILE print_debug(" - Done.\r\n"); #endif copy_and_run(0);

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How do I turn on display with RS690 ?
by 유택연 17 Oct '09

17 Oct '09

I used coreboot with SeaBIOS and AMD's vBIOS. System booted successfully except display not turned on. I used DirectTMDS for primay display. BIOS had been red my display's EDID rom. I had seen this signals with an oscilloscope. Error ocurred on executing VGA BIOS code. How do I turn on display? Here is log message. ------------- ..... Start bios (version pre-0.4.2-20090903_180544-azalea) init ivt init bda init pic init timer tsc calibrate start=2407971776 end=2410548093 diff=2576317 CPU Mhz=1500 math cp init Find memory size Attempting to find coreboot table Found coreboot table forwarder. Now attempting to find coreboot memory map Found mainboard amd dbm690t Found CBFS header at 0xfffdffe0 Ram Size=0x1c000000 Found 1 cpu(s) malloc setup init PMM init PNPBIOS table Scan for VGA option rom Attempting to init PCI bdf 01:05.0 (dev/ven 791f1002) Searching CBFS for prefix pci1002,791f.rom Found CBFS file fallback/payload Found CBFS file fallback/coreboot_ram Found CBFS file vgaroms/radeon.rom Found CBFS file img/filo Found CBFS file Attempting to map option rom on dev 01:05.0 Option rom sizing returned 0 0 Searching CBFS for prefix vgaroms/ Found CBFS file fallback/payload Found CBFS file fallback/coreboot_ram Found CBFS file vgaroms/radeon.rom Copying data 55296@0xfff20678 to 196608@0x000c0000 Checking rom 0x000c0000 (sig aa55 size 108) Running option rom at c000:0003 fail handle_15XX:294(86): a=00004e08 b=00000080 c=00000000 d=0000c000 ds=c000 es=f000 ss=0000 si=0000abc8 di=0000b0b6 bp=00000000 sp=000079f2 cs=c000 ip=2cc2 f=0046 fail handle_15XX:294(86): a=07ff4e08 b=00000005 c=00004e17 d=0000c002 ds=c000 es=f000 ss=0000 si=00002d58 di=0000b0b6 bp=000079d6 sp=000079f2 cs=c000 ip=2c5f f=0046 fail handle_15XX:294(86): a=00004e08 b=00000000 c=0000a401 d=00000080 ds=c000 es=f000 ss=0000 si=0000abc8 di=0000b0b6 bp=000079d6 sp=000079f0 cs=c000 ip=2c19 f=0046 Searching CBFS for prefix vgaroms/ Found CBFS file img/filo Found CBFS file Turning on vga console Starting SeaBIOS (version pre-0.4.2-20090903_180544-azalea) init keyboard i8042 timeout on flush init serial Found 2 serial ports Relocating coreboot bios tables init SMBIOS tables SMBIOS ptr=0x000fdce0 table=0x1bfff800 init boot device ordering init hard drives ATA controller 0 at 2020/2040 (dev 90 prog_if 8f) ATA controller 1 at 2028/2044 (dev 90 prog_if 8f) powerup iobase=2020 st=7f powerup iobase=2020 st=7f ata_detect ataid=0 sc=7f sn=7f dh=7f powerup iobase=2020 st=7f powerup iobase=2020 st=7f ata_detect ataid=1 sc=7f sn=7f dh=7f powerup iobase=2028 st=7f powerup iobase=2028 st=7f ata_detect ataid=2 sc=7f sn=7f dh=7f powerup iobase=2028 st=7f powerup iobase=2028 st=7f ata_detect ataid=3 sc=7f sn=7f dh=7f ..... ------------------- Jaagar

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build service results for r4801
by coreboot information 17 Oct '09

17 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stuge" checked in revision 4801 to the coreboot repository. This caused the following changes: Change Log: Silence src/Kconfig:349:warning: config symbol defined without type Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4801&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4801&device=msm800sev&vend… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r4800
by coreboot information 17 Oct '09

17 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stuge" checked in revision 4800 to the coreboot repository. This caused the following changes: Change Log: Remove some more instances of including previous empty x86/fpu/Makefile.inc Thanks to Jakob and Uwe for spotting the mistake! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4800&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4800&device=msm800sev&vend… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[v2] r4801 - trunk/coreboot-v2/src
by svn＠coreboot.org 17 Oct '09

17 Oct '09

Author: stuge Date: 2009-10-17 05:00:04 +0200 (Sat, 17 Oct 2009) New Revision: 4801 Modified: trunk/coreboot-v2/src/Kconfig Log: Silence src/Kconfig:349:warning: config symbol defined without type Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/Kconfig =================================================================== --- trunk/coreboot-v2/src/Kconfig 2009-10-17 02:51:26 UTC (rev 4800) +++ trunk/coreboot-v2/src/Kconfig 2009-10-17 03:00:04 UTC (rev 4801) @@ -347,6 +347,7 @@ coreboot can compress them using the LZMA algorithm. config COMPRESSED_PAYLOAD_NRV2B + bool default n endmenu

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[v2] r4800 - in trunk/coreboot-v2/src/cpu: amd/model_gx1 amd/model_gx2 amd/model_lx amd/socket_754 amd/socket_939 amd/socket_940 amd/socket_AM2 amd/socket_AM2r2 amd/socket_F amd/socket_F_1207 amd/socket_S1G1 intel/bga956 intel/ep80579 intel/slot_2 intel/socket_PGA370 intel/socket_mFCPGA478 intel/socket_mPGA478 intel/socket_mPGA479M intel/socket_mPGA603 intel/socket_mPGA604 via/model_c3 via/model_c7
by svn＠coreboot.org 17 Oct '09

17 Oct '09

Author: stuge Date: 2009-10-17 04:51:26 +0200 (Sat, 17 Oct 2009) New Revision: 4800 Modified: trunk/coreboot-v2/src/cpu/amd/model_gx1/Makefile.inc trunk/coreboot-v2/src/cpu/amd/model_gx2/Makefile.inc trunk/coreboot-v2/src/cpu/amd/model_lx/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_S1G1/Makefile.inc trunk/coreboot-v2/src/cpu/intel/bga956/Makefile.inc trunk/coreboot-v2/src/cpu/intel/ep80579/Makefile.inc trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_PGA370/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_mFCPGA478/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_mPGA478/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_mPGA479M/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_mPGA603/Makefile.inc trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/Makefile.inc trunk/coreboot-v2/src/cpu/via/model_c3/Makefile.inc trunk/coreboot-v2/src/cpu/via/model_c7/Makefile.inc Log: Remove some more instances of including previous empty x86/fpu/Makefile.inc Thanks to Jakob and Uwe for spotting the mistake! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/cpu/amd/model_gx1/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_gx1/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/model_gx1/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -19,7 +19,6 @@ ## subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/amd/model_gx2/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_gx2/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/model_gx2/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -1,5 +1,4 @@ subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/amd/model_lx/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_lx/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/model_lx/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -1,5 +1,4 @@ subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_939/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_AM2r2/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/pae Modified: trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/mtrr Modified: trunk/coreboot-v2/src/cpu/amd/socket_S1G1/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_S1G1/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/amd/socket_S1G1/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../mtrr subdirs-y += ../microcode subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/pae Modified: trunk/coreboot-v2/src/cpu/intel/bga956/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/bga956/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/bga956/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -2,7 +2,6 @@ subdirs-y += ../model_1067x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/ep80579/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/ep80579/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/ep80579/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -2,7 +2,6 @@ driver-y += ep80579_init.o subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -22,7 +22,6 @@ subdirs-y += ../model_6xx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_PGA370/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_PGA370/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_PGA370/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -22,7 +22,6 @@ subdirs-y += ../model_6xx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_mFCPGA478/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mFCPGA478/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_mFCPGA478/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -5,7 +5,6 @@ subdirs-y += ../model_6fx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA478/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA478/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA478/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -3,7 +3,6 @@ subdirs-y += ../model_6dx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA479M/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA479M/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA479M/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -3,7 +3,6 @@ subdirs-y += ../model_6dx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA603/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA603/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA603/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/intel/socket_mPGA604/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -4,7 +4,6 @@ subdirs-y += ../model_f4x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/via/model_c3/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/via/model_c3/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/via/model_c3/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -1,6 +1,5 @@ subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/via/model_c7/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/cpu/via/model_c7/Makefile.inc 2009-10-17 01:12:42 UTC (rev 4799) +++ trunk/coreboot-v2/src/cpu/via/model_c7/Makefile.inc 2009-10-17 02:51:26 UTC (rev 4800) @@ -1,6 +1,5 @@ subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm

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build service results for r4799
by coreboot information 17 Oct '09

17 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stuge" checked in revision 4799 to the coreboot repository. This caused the following changes: Change Log: Drop src/cpu/x86/fpu/{Config.lb,Makefile.inc} since they are also empty Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4799&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4799&device=msm800sev&vend… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot October 2009