coreboot October 2009

coreboot@coreboot.org

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534 discussions

[v2] r4806 - in trunk/coreboot-v2/src: cpu/amd/model_10xxx cpu/amd/model_fxx cpu/amd/socket_F_1207 mainboard/amd/serengeti_cheetah_fam10 mainboard/kontron/kt690 mainboard/supermicro/x6dhe_g mainboard/supermicro/x6dhe_g2 mainboard/tyan/s2912_fam10 northbridge/amd/amdfam10 northbridge/amd/amdk8 northbridge/amd/lx southbridge/nvidia/ck804
by svn＠coreboot.org 18 Oct '09

18 Oct '09

Author: uwe Date: 2009-10-18 15:47:30 +0200 (Sun, 18 Oct 2009) New Revision: 4806 Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig trunk/coreboot-v2/src/cpu/amd/model_fxx/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig trunk/coreboot-v2/src/mainboard/kontron/kt690/Kconfig trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Kconfig trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Kconfig trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Kconfig trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig trunk/coreboot-v2/src/northbridge/amd/amdk8/Kconfig trunk/coreboot-v2/src/northbridge/amd/lx/Kconfig trunk/coreboot-v2/src/southbridge/nvidia/ck804/Kconfig Log: Simplify Kconfig files by using "select" where possible (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -1,31 +1,15 @@ config CPU_AMD_MODEL_10XXX bool + select HAVE_INIT_TIMER + select HAVE_MOVNTI + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM -config HAVE_INIT_TIMER - bool - default y - depends on CPU_AMD_MODEL_10XXX - -config HAVE_MOVNTI - bool - default y - depends on CPU_AMD_MODEL_10XXX - config CPU_ADDR_BITS int default 48 depends on CPU_AMD_MODEL_10XXX -config USE_PRINTK_IN_CAR - bool - default y - depends on CPU_AMD_MODEL_10XXX - -config USE_DCACHE_RAM - bool - default y - depends on CPU_AMD_MODEL_10XXX - config DCACHE_RAM_BASE hex default 0xc4000 Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/Kconfig =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_fxx/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/cpu/amd/model_fxx/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -1,31 +1,15 @@ config CPU_AMD_MODEL_FXX bool + select HAVE_INIT_TIMER + select HAVE_MOVNTI + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM -config HAVE_INIT_TIMER - bool - default y - depends on CPU_AMD_MODEL_FXX - -config HAVE_MOVNTI - bool - default y - depends on CPU_AMD_MODEL_FXX - config CPU_ADDR_BITS int default 40 depends on CPU_AMD_MODEL_FXX -config USE_PRINTK_IN_CAR - bool - default y - depends on CPU_AMD_MODEL_FXX - -config USE_DCACHE_RAM - bool - default y - depends on CPU_AMD_MODEL_FXX - config DCACHE_RAM_BASE hex default 0xc8000 Modified: trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig =================================================================== --- trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/cpu/amd/socket_F_1207/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -1,6 +1,8 @@ config CPU_AMD_SOCKET_F_1207 bool select CPU_AMD_MODEL_10XXX + select PCI_IO_CFG_EXT + select CAR_FAM10 config CPU_SOCKET_TYPE hex @@ -13,11 +15,6 @@ default 0x0104 depends on CPU_AMD_SOCKET_F_1207 -config PCI_IO_CFG_EXT - bool - default y - depends on CPU_AMD_SOCKET_F_1207 - config EXT_RT_TBL_SUPPORT bool default n @@ -28,11 +25,6 @@ default n depends on CPU_AMD_SOCKET_F_1207 -config CAR_FAM10 - bool - default y - depends on CPU_AMD_SOCKET_F_1207 - config CBB hex default 0x0 Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -19,6 +19,8 @@ select AMDMCT select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_1024 + select ENABLE_APIC_EXT_ID + select LIFT_BSP_APIC_ID config MAINBOARD_DIR string @@ -121,12 +123,3 @@ default 0x1022 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 -config ENABLE_APIC_EXT_ID - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 - -config LIFT_BSP_APIC_ID - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 Modified: trunk/coreboot-v2/src/mainboard/kontron/kt690/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/kontron/kt690/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/mainboard/kontron/kt690/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -18,6 +18,7 @@ select IOAPIC select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 + select SB_HT_CHAIN_UNITID_OFFSET_ONLY config MAINBOARD_DIR string @@ -99,11 +100,6 @@ default 1 depends on BOARD_KONTRON_KT690 -config SB_HT_CHAIN_UNITID_OFFSET_ONLY - bool - default y - depends on BOARD_KONTRON_KT690 - config HT_CHAIN_END_UNITID_BASE hex default 0x1 Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -9,6 +9,7 @@ select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select BOARD_ROMSIZE_KB_1024 + select DRIVERS_GENERIC_DEBUG config MAINBOARD_DIR string @@ -55,7 +56,3 @@ default 15 depends on BOARD_SUPERMICRO_X6DHE_G -config DRIVERS_GENERIC_DEBUG - bool - default y - depends on BOARD_SUPERMICRO_X6DHE_G Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -9,6 +9,7 @@ select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select BOARD_ROMSIZE_KB_1024 + select DRIVERS_GENERIC_DEBUG config MAINBOARD_DIR string @@ -55,7 +56,3 @@ default 15 depends on BOARD_SUPERMICRO_X6DHE_G2 -config DRIVERS_GENERIC_DEBUG - bool - default y - depends on BOARD_SUPERMICRO_X6DHE_G2 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Kconfig =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -16,6 +16,8 @@ select MEM_TRAIN_SEQ select SB_HT_CHAIN_UNITID_OFFSET_ONLY select BOARD_ROMSIZE_KB_1024 + select ENABLE_APIC_EXT_ID + select AMDMCT config MAINBOARD_DIR string @@ -147,12 +149,3 @@ default "mc_patch_01000095.h" depends on BOARD_TYAN_S2912_FAM10 -config ENABLE_APIC_EXT_ID - bool - default y - depends on BOARD_TYAN_S2912_FAM10 - -config AMDMCT - bool - default y - depends on BOARD_TYAN_S2912_FAM10 Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -20,20 +20,12 @@ config NORTHBRIDGE_AMD_AMDFAM10 bool select HAVE_HIGH_TABLES + select HYPERTRANSPORT_PLUGIN_SUPPORT + select HT3_SUPPORT config AGP_APERTURE_SIZE hex default 0x4000000 depends on NORTHBRIDGE_AMD_AMDFAM10 -config HYPERTRANSPORT_PLUGIN_SUPPORT - bool - default y - depends on NORTHBRIDGE_AMD_AMDFAM10 - -config HT3_SUPPORT - bool - default y - depends on NORTHBRIDGE_AMD_AMDFAM10 - source src/northbridge/amd/amdfam10/root_complex/Kconfig Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/Kconfig =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -20,6 +20,7 @@ config NORTHBRIDGE_AMD_AMDK8 bool select HAVE_HIGH_TABLES + select HYPERTRANSPORT_PLUGIN_SUPPORT config AGP_APERTURE_SIZE hex @@ -31,9 +32,4 @@ default n depends on NORTHBRIDGE_AMD_AMDK8 -config HYPERTRANSPORT_PLUGIN_SUPPORT - bool - default y - depends on NORTHBRIDGE_AMD_AMDK8 - source src/northbridge/amd/amdk8/root_complex/Kconfig Modified: trunk/coreboot-v2/src/northbridge/amd/lx/Kconfig =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/lx/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/northbridge/amd/lx/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -1,7 +1,4 @@ config NORTHBRIDGE_AMD_LX bool + select HAVE_HIGH_TABLES -config HAVE_HIGH_TABLES - bool - default y - depends on NORTHBRIDGE_AMD_LX Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/Kconfig =================================================================== --- trunk/coreboot-v2/src/southbridge/nvidia/ck804/Kconfig 2009-10-18 13:42:50 UTC (rev 4805) +++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/Kconfig 2009-10-18 13:47:30 UTC (rev 4806) @@ -1,13 +1,5 @@ config SOUTHBRIDGE_NVIDIA_CK804 bool + select HAVE_HARD_RESET + select IOAPIC -config HAVE_HARD_RESET - bool - default y - depends on SOUTHBRIDGE_NVIDIA_CK804 - -config IOAPIC - bool - default y - depends on SOUTHBRIDGE_NVIDIA_CK804 -

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[v2] r4805 - trunk/coreboot-v2/src/northbridge/via/vt8601
by svn＠coreboot.org 18 Oct '09

18 Oct '09

Author: uwe Date: 2009-10-18 15:42:50 +0200 (Sun, 18 Oct 2009) New Revision: 4805 Modified: trunk/coreboot-v2/src/northbridge/via/vt8601/raminit.c Log: Drop dead/unused code (trivial). DEBUG_SETNORTHB is never defined, and even if it was, setnorthb() is never called anyway. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/coreboot-v2/src/northbridge/via/vt8601/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/via/vt8601/raminit.c 2009-10-18 03:15:59 UTC (rev 4804) +++ trunk/coreboot-v2/src/northbridge/via/vt8601/raminit.c 2009-10-18 13:42:50 UTC (rev 4805) @@ -69,20 +69,6 @@ } } -#ifdef DEBUG_SETNORTHB -void setnorthb(device_t north, uint8_t reg, uint8_t val) -{ - print_debug("setnorth: reg "); - print_debug_hex8(reg); - print_debug(" to "); - print_debug_hex8(val); - print_debug("\r\n"); - pci_write_config8(north, reg, val); -} -#else -#define setnorthb pci_write_config8 -#endif - void dumpnorth(device_t north) { unsigned int r, c;

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build service results for r4804
by coreboot information 18 Oct '09

18 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "rminnich" checked in revision 4804 to the coreboot repository. This caused the following changes: Change Log: Remove this, we no longer need it. Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4804&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4804&device=msm800sev&vend… If something broke during this checkin please be a pain in rminnich's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

Remove include/fs
by Myles Watson 18 Oct '09

18 Oct '09

No one includes include/fs/*.h Can we just get rid of the directory? I was going to fix the CONFIG_* variables there, but what's the point if it needs to be removed. Thanks, Myles

3 3

[v2] r4804 - trunk/coreboot-v2/src/include
by svn＠coreboot.org 18 Oct '09

18 Oct '09

Author: rminnich Date: 2009-10-18 05:15:59 +0200 (Sun, 18 Oct 2009) New Revision: 4804 Removed: trunk/coreboot-v2/src/include/fs/ Log: Remove this, we no longer need it. Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>

1 0

[PATCH] serialice: Fix a couple of minor typos
by Mark Marshall 18 Oct '09

18 Oct '09

Hi. I've been lurking here for some time, but this is my first post / patch. I'm about to start playing with coreboot a bit and was thinking about getting serialice working with the ASUS P2B (I'm interested in this vintage of hardware at the moment). Anyway, as I was looking through the serialice code, I've made these few patches, which are minor. MM

2 1

[PATCH] serialice: Add MSI MS-6178 support, and HAVE_SSE
by Uwe Hermann 18 Oct '09

18 Oct '09

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

1 1

build service results for r4803
by coreboot information 17 Oct '09

17 Oct '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stuge" checked in revision 4803 to the coreboot repository. This caused the following changes: Change Log: Move files from src/cpu/x86/{fpu,mmx,sse}/ to x86/ Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4803&device=db800&vendor=a… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4803&device=msm800sev&vend… If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[PATCH] Move files from src/cpu/x86/{fpu, mmx, sse}/ to x86/
by Peter Stuge 17 Oct '09

17 Oct '09

abuild tested. I'll remove the empty dirs too. I svn mv:d files around but the patch doesn't show that clearly: src/cpu $ svn st x86/ A + x86/sse_disable.inc D x86/fpu D x86/fpu/enable_fpu.inc D x86/sse D x86/sse/disable_sse.inc D x86/sse/enable_sse.inc A + x86/mmx_disable.inc D x86/mmx D x86/mmx/disable_mmx.inc A + x86/fpu_enable.inc A + x86/sse_enable.inc //Peter

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[v2] r4803 - in trunk/coreboot-v2/src: cpu/x86 mainboard mainboard/a-trend/atc-6220 mainboard/a-trend/atc-6240 mainboard/abit/be6-ii_v2_0 mainboard/advantech/pcm-5820 mainboard/amd/db800 mainboard/amd/norwich mainboard/amd/rumba mainboard/artecgroup/dbe61 mainboard/asi/mb_5blgp mainboard/asi/mb_5blmp mainboard/asus/mew-am mainboard/asus/mew-vm mainboard/asus/p2b mainboard/asus/p2b-d mainboard/asus/p2b-ds mainboard/asus/p2b-f mainboard/asus/p3b-f mainboard/axus/tc320 mainboard/azza/pt-6ibd mainboa
by svn＠coreboot.org 17 Oct '09

17 Oct '09

Author: stuge Date: 2009-10-17 17:01:00 +0200 (Sat, 17 Oct 2009) New Revision: 4803 Added: trunk/coreboot-v2/src/cpu/x86/fpu_enable.inc trunk/coreboot-v2/src/cpu/x86/mmx_disable.inc trunk/coreboot-v2/src/cpu/x86/sse_disable.inc trunk/coreboot-v2/src/cpu/x86/sse_enable.inc Removed: trunk/coreboot-v2/src/cpu/x86/fpu/ trunk/coreboot-v2/src/cpu/x86/mmx/ trunk/coreboot-v2/src/cpu/x86/sse/ Modified: trunk/coreboot-v2/src/mainboard/Makefile.romccboard.inc trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Config.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Config.lb trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Config.lb trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Config.lb trunk/coreboot-v2/src/mainboard/amd/db800/Config.lb trunk/coreboot-v2/src/mainboard/amd/norwich/Config.lb trunk/coreboot-v2/src/mainboard/amd/rumba/Config.lb trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Config.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Config.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Config.lb trunk/coreboot-v2/src/mainboard/asus/mew-am/Config.lb trunk/coreboot-v2/src/mainboard/asus/mew-vm/Config.lb trunk/coreboot-v2/src/mainboard/asus/p2b-d/Config.lb trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Config.lb trunk/coreboot-v2/src/mainboard/asus/p2b-f/Config.lb trunk/coreboot-v2/src/mainboard/asus/p2b/Config.lb trunk/coreboot-v2/src/mainboard/asus/p3b-f/Config.lb trunk/coreboot-v2/src/mainboard/axus/tc320/Config.lb trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Config.lb trunk/coreboot-v2/src/mainboard/bcom/winnet100/Config.lb trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Config.lb trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Makefile.inc trunk/coreboot-v2/src/mainboard/biostar/m6tba/Config.lb trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb trunk/coreboot-v2/src/mainboard/dell/s1850/Config.lb trunk/coreboot-v2/src/mainboard/dell/s1850/Makefile.inc trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Config.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Config.lb trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Config.lb trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Config.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Config.lb trunk/coreboot-v2/src/mainboard/iei/juki-511p/Config.lb trunk/coreboot-v2/src/mainboard/iei/nova4899r/Config.lb trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb trunk/coreboot-v2/src/mainboard/intel/jarrell/Config.lb trunk/coreboot-v2/src/mainboard/intel/mtarvon/Config.lb trunk/coreboot-v2/src/mainboard/intel/truxton/Config.lb trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Config.lb trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb trunk/coreboot-v2/src/mainboard/jetway/j7f24/Makefile.inc trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Config.lb trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Config.lb trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Config.lb trunk/coreboot-v2/src/mainboard/mitac/6513wu/Config.lb trunk/coreboot-v2/src/mainboard/msi/ms6119/Config.lb trunk/coreboot-v2/src/mainboard/msi/ms6147/Config.lb trunk/coreboot-v2/src/mainboard/msi/ms6156/Config.lb trunk/coreboot-v2/src/mainboard/msi/ms6178/Config.lb trunk/coreboot-v2/src/mainboard/nec/powermate2000/Config.lb trunk/coreboot-v2/src/mainboard/olpc/btest/Config.lb trunk/coreboot-v2/src/mainboard/olpc/rev_a/Config.lb trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Config.lb trunk/coreboot-v2/src/mainboard/rca/rm4100/Config.lb trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Config.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Config.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Config.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Config.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Config.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb trunk/coreboot-v2/src/mainboard/televideo/tc7020/Config.lb trunk/coreboot-v2/src/mainboard/thomson/ip1000/Config.lb trunk/coreboot-v2/src/mainboard/tyan/s1846/Config.lb trunk/coreboot-v2/src/mainboard/via/epia-cn/Config.lb trunk/coreboot-v2/src/mainboard/via/epia-cn/Makefile.inc trunk/coreboot-v2/src/mainboard/via/epia-m/Config.lb trunk/coreboot-v2/src/mainboard/via/epia-m/Makefile.inc trunk/coreboot-v2/src/mainboard/via/epia-m700/Config.lb trunk/coreboot-v2/src/mainboard/via/epia-n/Config.lb trunk/coreboot-v2/src/mainboard/via/epia-n/Makefile.inc trunk/coreboot-v2/src/mainboard/via/epia/Config.lb trunk/coreboot-v2/src/mainboard/via/epia/Makefile.inc trunk/coreboot-v2/src/mainboard/via/pc2500e/Config.lb trunk/coreboot-v2/src/mainboard/via/vt8454c/Config.lb Log: Move files from src/cpu/x86/{fpu,mmx,sse}/ to x86/ Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Myles Watson <mylesgw(a)gmail.com> Copied: trunk/coreboot-v2/src/cpu/x86/fpu_enable.inc (from rev 4799, trunk/coreboot-v2/src/cpu/x86/fpu/enable_fpu.inc) =================================================================== --- trunk/coreboot-v2/src/cpu/x86/fpu_enable.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/x86/fpu_enable.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -0,0 +1,10 @@ + /* preserve BIST in %eax */ +__fpu_start: + movl %eax, %ebp + + /* Disable floating point emulation */ + movl %cr0, %eax + andl $~(1<<2), %eax + movl %eax, %cr0 + + movl %ebp, %eax Copied: trunk/coreboot-v2/src/cpu/x86/mmx_disable.inc (from rev 4799, trunk/coreboot-v2/src/cpu/x86/mmx/disable_mmx.inc) =================================================================== --- trunk/coreboot-v2/src/cpu/x86/mmx_disable.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/x86/mmx_disable.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -0,0 +1,2 @@ + /* Clear out an mmx state */ + emms Copied: trunk/coreboot-v2/src/cpu/x86/sse_disable.inc (from rev 4799, trunk/coreboot-v2/src/cpu/x86/sse/disable_sse.inc) =================================================================== --- trunk/coreboot-v2/src/cpu/x86/sse_disable.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/x86/sse_disable.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -0,0 +1,18 @@ + /* + * Put the processor back into a reset state + * with respect to the xmm registers. + */ + + xorps %xmm0, %xmm0 + xorps %xmm1, %xmm1 + xorps %xmm2, %xmm2 + xorps %xmm3, %xmm3 + xorps %xmm4, %xmm4 + xorps %xmm5, %xmm5 + xorps %xmm6, %xmm6 + xorps %xmm7, %xmm7 + + /* Disable sse instructions */ + movl %cr4, %eax + andl $~(3<<9), %eax + movl %eax, %cr4 Copied: trunk/coreboot-v2/src/cpu/x86/sse_enable.inc (from rev 4799, trunk/coreboot-v2/src/cpu/x86/sse/enable_sse.inc) =================================================================== --- trunk/coreboot-v2/src/cpu/x86/sse_enable.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/x86/sse_enable.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -0,0 +1,14 @@ + /* preserve BIST in %eax */ + movl %eax, %ebp + + /* + * Enable the use of the xmm registers + */ + + /* Enable sse instructions */ + movl %cr4, %eax + orl $(1<<9), %eax + movl %eax, %cr4 + + movl %ebp, %eax + Modified: trunk/coreboot-v2/src/mainboard/Makefile.romccboard.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/Makefile.romccboard.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/Makefile.romccboard.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -24,15 +24,15 @@ crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/cpu_reset.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-$(CONFIG_CPU_AMD_GX1) += ../../../../src/cpu/amd/model_gx1/cpu_setup.inc crt0-$(CONFIG_CPU_AMD_GX1) += ../../../../src/cpu/amd/model_gx1/gx_setup.inc -crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse/enable_sse.inc +crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse_enable.inc crt0-y += failover.inc crt0-y += auto.inc -crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse/disable_sse.inc -crt0-$(CONFIG_MMX) += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse_disable.inc +crt0-$(CONFIG_MMX) += ../../../../src/cpu/x86/mmx_disable.inc ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,7 +63,7 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/amd/db800/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/db800/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/amd/db800/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -71,7 +71,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/norwich/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/amd/norwich/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -73,7 +73,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,7 +84,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -70,7 +70,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,7 +63,7 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -85,7 +85,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -65,9 +65,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,9 +84,9 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-d/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-d/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-d/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,9 +63,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,9 +63,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/axus/tc320/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/axus/tc320/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/axus/tc320/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -61,7 +61,7 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,9 +63,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/bcom/winnet100/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnet100/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/bcom/winnet100/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,7 +63,7 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -66,9 +66,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -38,9 +38,9 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -24,12 +24,12 @@ crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/cpu_reset.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc -crt0-y += ../../../../src/cpu/x86/sse/enable_sse.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc +crt0-y += ../../../../src/cpu/x86/sse_enable.inc crt0-y += failover.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/sse/disable_sse.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/sse_disable.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds Modified: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -83,11 +83,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -90,7 +90,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -71,7 +71,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,7 +84,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -94,7 +94,7 @@ ## ## Setup RAM ## - mainboardinit cpu/x86/fpu/enable_fpu.inc + mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## the id string will be in cbfs. We will expect flashrom to parse cbfs for the idstring in future. Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/iei/juki-511p/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/juki-511p/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/iei/juki-511p/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -86,7 +86,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/iei/nova4899r/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/nova4899r/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/iei/nova4899r/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -85,7 +85,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -52,7 +52,7 @@ ldscript /arch/i386/lib/failover.lds # mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc dir /pc80 Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/intel/mtarvon/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/mtarvon/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/intel/mtarvon/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -102,11 +102,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/intel/truxton/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/truxton/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/intel/truxton/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -102,11 +102,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -86,11 +86,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -66,9 +66,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -34,9 +34,9 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,7 +84,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -93,7 +93,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -92,7 +92,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/mitac/6513wu/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/mitac/6513wu/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/mitac/6513wu/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -65,9 +65,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/msi/ms6147/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6147/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/msi/ms6147/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -72,9 +72,9 @@ mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/msi/ms6156/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6156/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/msi/ms6156/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -62,9 +62,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/nec/powermate2000/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nec/powermate2000/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/nec/powermate2000/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -62,9 +62,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/olpc/btest/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,7 +84,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -84,7 +84,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -91,7 +91,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_lx/cache_as_ram.inc mainboardinit ./cache_as_ram_auto.inc Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -67,9 +67,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -89,11 +89,11 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit cpu/x86/sse/enable_sse.inc +mainboardinit cpu/x86/fpu_enable.inc +mainboardinit cpu/x86/sse_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/sse/disable_sse.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/sse_disable.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -91,7 +91,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ## Modified: trunk/coreboot-v2/src/mainboard/televideo/tc7020/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/televideo/tc7020/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/televideo/tc7020/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -63,7 +63,7 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc Modified: trunk/coreboot-v2/src/mainboard/thomson/ip1000/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/thomson/ip1000/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/thomson/ip1000/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -67,9 +67,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -64,9 +64,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/via/epia/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -83,9 +83,9 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/via/epia/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -33,9 +33,9 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -66,9 +66,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -38,9 +38,9 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -91,9 +91,9 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc ## ## Include the secondary Configuration files Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -40,9 +40,9 @@ crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/northbridge/via/vx800/romstrap.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/via/epia-m700/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m700/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-m700/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -91,7 +91,7 @@ # cpu_reset.inc,so ... # mainboardinit ./failover.inc end -# mainboardinit cpu/x86/fpu/enable_fpu.inc +# mainboardinit cpu/x86/fpu_enable.inc if CONFIG_USE_DCACHE_RAM if CONFIG_USE_INIT @@ -101,7 +101,7 @@ end end -# mainboardinit cpu/x86/mmx/disable_mmx.inc +# mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/via/epia-n/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-n/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-n/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -113,9 +113,9 @@ ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/via/epia-n/Makefile.inc =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-n/Makefile.inc 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/epia-n/Makefile.inc 2009-10-17 15:01:00 UTC (rev 4803) @@ -37,9 +37,9 @@ crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc crt0-y += ../../../../src/arch/i386/lib/id.inc -crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/fpu_enable.inc crt0-y += auto.inc -crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +crt0-y += ../../../../src/cpu/x86/mmx_disable.inc ifdef POST_EVALUATION Modified: trunk/coreboot-v2/src/mainboard/via/pc2500e/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/pc2500e/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/pc2500e/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -65,9 +65,9 @@ ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc -mainboardinit cpu/x86/mmx/disable_mmx.inc +mainboardinit cpu/x86/mmx_disable.inc dir /pc80 config chip.h Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Config.lb 2009-10-17 13:25:07 UTC (rev 4802) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Config.lb 2009-10-17 15:01:00 UTC (rev 4803) @@ -98,7 +98,7 @@ ## ## Setup RAM ## -mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/fpu_enable.inc mainboardinit ./auto.inc ##

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coreboot October 2009