coreboot June 2008

coreboot@coreboot.org

75 participants
230 discussions

help with win-xp and legacybios/coreboot
by Kevin O'Connor 03 Jul '08

03 Jul '08

Hi, I have successfully installed and booted win-xp with coreboot-v2 and legacybios under qemu. Unfortunately, when I try to install or boot win-xp with coreboot-v2 and legacybios on my via epia-m the system hangs. At this point, I don't know if the problem is related to coreboot and its epia-m support, or if it is related to legacybios. I've confirmed that the hang does not occur inside the bios. The last thing the install reports before hanging is "Setup is starting Windows". It would be helpful if others could try installing / booting win-xp on real hardware. If you can do this, please follow the directions at: http://www.coreboot.org/pipermail/coreboot/2008-June/036108.html Thanks, -Kevin

3 7

[PATCH] buildrom: Update kconfig to recent version
by Uwe Hermann 02 Jul '08

02 Jul '08

See patch. The actual patch is buildrom_update_kconfig.patch.gz but that's huge and totally unreadable so I recommend reviewing buildrom_update_kconfig_makefile.patch That's the only change to the buildrom code itself, the rest is just replacing the whole scripts/kconfig/ dir with the new kconfig. I used the coreinfo kconfig/ with only a handful of string replacements a la s/coreinfo/buildrom/ so the diff to coreinfo's kconfig is tiny. I did some ad-hoc testing with this, tried various kconfig targets (menuconfig, xconfig, gconfig, ...) and various buildrom builds and it seems to work fine so far, but some more testing by others is highly appreciated. Thanks, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

3 6

flashrom: Move options -s -e to -S -E and -E to -e.
by Peter Stuge 02 Jul '08

02 Jul '08

NOTE! This will break all scripts that erase flash chips automatically. But better now than post 1.0. //Peter

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Add legacybios to buildrom
by Myles Watson 01 Jul '08

01 Jul '08

This is the same patch I posted earlier which adds legacybios to buildrom. It has some options hardcoded in hardcode.diff because it seems like the easiest way to keep the configuration in one place. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

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AMD761 + VIA VT82C686B (eventually HighPiont HPT370A)
by Marek Artur Penther 01 Jul '08

01 Jul '08

I still waiting for linuxbios/coreboot to support at least these devices (AMD761, VIA VT82C686B). I have 'Abit KG7-RAID' MotherBoard and there are such devices. I'd like to run this MB with CoreBoot. I can provide a lot of datasheets and specsheets for these devices (all family of AMD7xx (AMD751, AMD756, AMD761, AMD762, AMD766, AMD768)).

3 4

buildrom - LAB uclibc compilation failure
by Cristi Măgherușan 01 Jul '08

01 Jul '08

Hello, As part of my GSoC project, I've started making a Linux-as-Bootloader payload using buildrom, but I got stuck when compiling uclibc. I get a compilation error saying that it cannot find limits.h. This is the complete error message: CC libc/sysdeps/linux/common/chdir.os In file included from ./include/sys/param.h:22, from libc/sysdeps/linux/common/chdir.c:13: ./include/limits.h:124:26: error: limits.h: No such file or directory make[2]: *** [libc/sysdeps/linux/common/chdir.os] Error 1 make[1]: *** [lib/libc.so.0] Error 2 make[1]: Leaving directory `/home/cristi/soc/buildrom/buildrom-devel/work/uclibc/uClibc-0.9.29' make: *** [/home/cristi/soc/buildrom/buildrom-devel/work/uclibc/uClibc-0.9.29/lib/libc.a] Error 2 I searched google and it seems it's a toolchain error. Can someone with more experience in hacking on buildrom give me a hint about what I'm doing wrong? Thanks, Cristi

4 7

Intel rumers spreading??
by Joseph Smith 01 Jul '08

01 Jul '08

Maybe it is just me, but it seems like lately there have been a lot of posts to the mailing list about, coreboot not supporting ANY Intel chipsets/cpu's. Is there rumors spreading around the mill??? If so we need to nip this in the bud, this is probably discouraging people that want to get involved with coreboot. -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

7 14

Re: [coreboot] r3401 - trunk/util/flashrom
by Carl-Daniel Hailfinger 01 Jul '08

01 Jul '08

On 01.07.2008 01:45, svn(a)coreboot.org wrote: > Author: stepan > Date: 2008-07-01 01:45:22 +0200 (Tue, 01 Jul 2008) > New Revision: 3401 > > Modified: > trunk/util/flashrom/chipset_enable.c > trunk/util/flashrom/flash.h > trunk/util/flashrom/ichspi.c > trunk/util/flashrom/it87spi.c > trunk/util/flashrom/spi.c > Log: > First attempt to clean up SPI probing and create a common > construct: the flash bus. > > At some point the flash bus will be part of struct flashchip. > > Pardon me for pushing this in, but I think it is important to beware of further > decay and it will improve things for other developers in the short run. > > Carl-Daniel, I will consider your suggestions in another patch. I want to keep > things from getting too much for now. The patch includes Rudolf's VIA SPI > changes though. > OK with me. I assume you have tested the code. > Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH 2/3] Add support for 4 bytes rdid
by Rudolf Marek 01 Jul '08

01 Jul '08

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFIaUZb3J9wPJqZRNURAl74AKCIbhYCudIyKL/hJ3aHYEzb1O3O0ACgrEg7 Wr8KvR7+GfSGb3l875Ibk3I= =9ePr -----END PGP SIGNATURE-----

4 5

Re: [coreboot] r3399 - trunk/util/flashrom
by Carl-Daniel Hailfinger 01 Jul '08

01 Jul '08

On 30.06.2008 23:45, svn(a)coreboot.org wrote: > Author: ruik > Date: 2008-06-30 23:45:17 +0200 (Mon, 30 Jun 2008) > New Revision: 3399 > > Modified: > trunk/util/flashrom/flash.h > trunk/util/flashrom/spi.c > Log: > Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that. > > Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> > Acked-by: Peter Stuge <peter(a)stuge.se> > Very nice work! AFAICS it will work with all problematic cases I know. Regards, Carl-Daniel -- http://www.hailfinger.org/

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coreboot June 2008