coreboot March 2008

coreboot@coreboot.org

75 participants
382 discussions

r3193 - trunk/coreboot-v2/src/mainboard/rca/rm4100
by svn＠coreboot.org 28 Mar '08

28 Mar '08

Author: linux_junkie Date: 2008-03-28 04:35:11 +0100 (Fri, 28 Mar 2008) New Revision: 3193 Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb trunk/coreboot-v2/src/mainboard/rca/rm4100/irq_tables.c Log: Fix for irq routing issues. Signed-off-by: Joseph Smith <joe(a)smittys.pointclark.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2008-03-27 23:26:40 UTC (rev 3192) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2008-03-28 03:35:11 UTC (rev 3193) @@ -69,7 +69,7 @@ default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default HAVE_PIRQ_TABLE = 1 -default IRQ_SLOT_COUNT = 10 +default IRQ_SLOT_COUNT = 7 default HAVE_MP_TABLE = 0 default HAVE_ACPI_TABLES = 0 default CONFIG_IOAPIC = 0 Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/irq_tables.c =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/irq_tables.c 2008-03-27 23:26:40 UTC (rev 3192) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/irq_tables.c 2008-03-28 03:35:11 UTC (rev 3193) @@ -23,7 +23,7 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32+16*IRQ_SLOT_COUNT, /* there can be total 10 devices on the bus */ + 32+16*IRQ_SLOT_COUNT, /* there can be total 7 devices on the bus */ 0x00, /* Where the interrupt router lies (bus) */ (0x1f<<3)|0x0, /* Where the interrupt router lies (dev) */ 0, /* IRQs devoted exclusively to PCI usage */ @@ -31,19 +31,16 @@ 0x24c0, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x14, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + 0xcd, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x1d<<3)|0x0, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x01ef8}}, 0x0, 0x0}, /* [A] USB UHCI Controller #1 */ - {0x00,(0x1d<<3)|0x1, {{0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x60, 0x01ef8}}, 0x0, 0x0}, /* [B] USB UHCI Controller #2 */ - {0x00,(0x1d<<3)|0x2, {{0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x60, 0x1ef8}, {0x61, 0x01ef8}}, 0x0, 0x0}, /* [C] USB UHCI Controller #3 */ - {0x00,(0x1d<<3)|0x7, {{0x63, 0x1ef8}, {0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x01ef8}}, 0x0, 0x0}, /* [D] USB2 EHCI Controller */ - {0x00,(0x1f<<3)|0x1, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x01ef8}}, 0x0, 0x0}, /* [A] IDE Controller */ - {0x00,(0x1f<<3)|0x3, {{0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x60, 0x01ef8}}, 0x0, 0x0}, /* [B] SMBus Controller */ - {0x00,(0x02<<3)|0x0, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x01ef8}}, 0x0, 0x0}, /* [A] VGA compatible controller */ - {0x00,(0x1f<<3)|0x5, {{0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x60, 0x01ef8}}, 0x0, 0x0}, /* [B] AC'97 Audio Controller */ + {0x00,(0x02<<3)|0x0, {{0x60, 0x1ef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, /* [A] VGA compatible controller */ + {0x00,(0x1d<<3)|0x0, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x62, 0x1ef8}, {0x6b, 0x01ef8}}, 0x0, 0x0}, /* [D] USB2 EHCI Controller */ + {0x00,(0x1f<<3)|0x0, {{0x62, 0x1ef8}, {0x61, 0x1ef8}, {0x6b, 0x1ef8}, {0x63, 0x01ef8}}, 0x0, 0x0}, /* [A] IDE Controller */ {0x01,(0x08<<3)|0x0, {{0x68, 0x1ef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, /* [A] Ethernet controller */ - {0x00,(0x1f<<3)|0x6, {{0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x64, 0x01ef8}}, 0x0, 0x0}, /* [B] AC'97 Modem Controller */ + {0x01,(0x00<<3)|0x0, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x01ef8}}, 0x1, 0x0}, /* [A] USB UHCI Controller #1 */ + {0x01,(0x01<<3)|0x0, {{0x63, 0x1ef8}, {0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x01ef8}}, 0x2, 0x0}, /* [B] USB UHCI Controller #2 */ + {0x01,(0x02<<3)|0x0, {{0x62, 0x1ef8}, {0x63, 0x1ef8}, {0x60, 0x1ef8}, {0x61, 0x01ef8}}, 0x3, 0x0}, /* [C] USB UHCI Controller #3 */ } };

1 0

use FILO boot usb
by Wang, Qingpei 28 Mar '08

28 Mar '08

Hi,all I found that while I tried to boot linux from a usb disk by filo. It failed, the debug message says " dma_to_td can not find td". Is there any one who can help me ? thanks Jason Wang Intern Electronic Engineering Lab Peking University Beijing Technology Development Center Advanced Micro Devices(AMD) E-mail: Qingpei.Wang(a)amd.com wangqingpei(a)hotmail.com Phone:13426369984 -----Original Message----- From: coreboot-bounces(a)coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of coreboot-request(a)coreboot.org Sent: Friday, March 28, 2008 7:27 AM To: coreboot(a)coreboot.org Subject: coreboot Digest, Vol 37, Issue 181 Send coreboot mailing list submissions to coreboot(a)coreboot.org To subscribe or unsubscribe via the World Wide Web, visit http://www.coreboot.org/mailman/listinfo/coreboot or, via email, send a message with subject or body 'help' to coreboot-request(a)coreboot.org You can reach the person managing the list at coreboot-owner(a)coreboot.org When replying, please edit your Subject line so it is more specific than "Re: Contents of coreboot digest..." Today's Topics: 1. [libpayload] Fix drawing chars (Jordan Crouse) 2. [libpayload] fix curses drawing problem (Jordan Crouse) 3. [PATCH] coreinfo: CMOS Dump support and other fixes (Uwe Hermann) 4. Re: [libpayload] fix curses drawing problem (Uwe Hermann) 5. Re: [PATCH] libpayload: CMOS / BCD functions (Peter Stuge) 6. Re: [libpayload] Fix drawing chars (Peter Stuge) 7. [PATCH][RFC] LAR segfault when adding to a full archive (Carl-Daniel Hailfinger) 8. r3192 - in trunk/payloads/libpayload: . drivers include libc (svn(a)coreboot.org) ---------------------------------------------------------------------- Message: 1 Date: Thu, 27 Mar 2008 15:33:13 -0600 From: Jordan Crouse <jordan.crouse(a)amd.com> Subject: [coreboot] [libpayload] Fix drawing chars To: coreboot(a)coreboot.org Message-ID: <20080327213313.GQ2063(a)cosmic.amd.com> Content-Type: text/plain; charset=us-ascii Somewhere in the layers of functions we're accidently casting unsigned character values as signed, and they are getting sign extended, causing blinking and bold text. This patch makes sure we only use the 8 bits we support right now. This is probably not wchar safe, as the comment says. -- Jordan Crouse Systems Software Development Engineer Advanced Micro Devices, Inc. ------------------------------ Message: 2 Date: Thu, 27 Mar 2008 15:34:50 -0600 From: Jordan Crouse <jordan.crouse(a)amd.com> Subject: [coreboot] [libpayload] fix curses drawing problem To: coreboot(a)coreboot.org Message-ID: <20080327213450.GR2063(a)cosmic.amd.com> Content-Type: text/plain; charset="us-ascii" This fixes a curses drawing problem - characters are getting accidently sign extended, which is badness for drawing characters (i.e chars with values >= 128). This works around the problem so the right values get sent to VGA. -- Jordan Crouse Systems Software Development Engineer Advanced Micro Devices, Inc.

1 0

r647 - coreboot-v3/util/lar
by svn＠coreboot.org 28 Mar '08

28 Mar '08

Author: hailfinger Date: 2008-03-28 00:56:36 +0100 (Fri, 28 Mar 2008) New Revision: 647 Modified: coreboot-v3/util/lar/lar.h coreboot-v3/util/lar/stream.c Log: Alvar Kusma found a bug in util/lar: If you try to add a file to a full LAR archive, the LAR utility will segfault. This is reproduced easily by zerofilling the LAR, then adding anything to it. Looking at the code, the reason is obvious: lar_empty_offset() can return an error code (-1). None of the callers check for an error code, they simply assume the return value is valid. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/util/lar/lar.h =================================================================== --- coreboot-v3/util/lar/lar.h 2008-03-25 19:52:13 UTC (rev 646) +++ coreboot-v3/util/lar/lar.h 2008-03-27 23:56:36 UTC (rev 647) @@ -58,7 +58,9 @@ #define BOOTBLOCK_NAME_LEN 16 typedef uint64_t u64; +typedef int64_t s64; typedef uint32_t u32; +typedef int32_t s32; typedef uint8_t u8; /* NOTE -- This and the coreboot lar.h may NOT be in sync. Be careful. */ Modified: coreboot-v3/util/lar/stream.c =================================================================== --- coreboot-v3/util/lar/stream.c 2008-03-25 19:52:13 UTC (rev 646) +++ coreboot-v3/util/lar/stream.c 2008-03-27 23:56:36 UTC (rev 647) @@ -492,7 +492,7 @@ * @param lar the LAR archive structure * @return The offset of the first chunk of empty space */ -static int lar_empty_offset(struct lar *lar) +static s64 lar_empty_offset(struct lar *lar) { u32 offset = 0; struct lar_header *header; @@ -508,10 +508,12 @@ offset += get_next_offset(header); } - if (offset >= get_bootblock_offset(lar->size)) + if (offset >= get_bootblock_offset(lar->size)) { + err("No empty space found!\n"); return -1; + } - return offset; + return (s64)offset; } /** @@ -825,11 +827,16 @@ int maxsize(struct lar *lar, char *name) { int size; - u32 offset; + s64 offset; int bootblock_size; /* Find the beginning of the available space in the LAR */ +#warning We should check all chunks of free space in the LAR. Right now we do not return the maximum size, but the size of the first chunk. offset = lar_empty_offset(lar); + if (offset < 0) { + err("maxsize is negative\n"); + return offset; + } /* Figure out how big our header will be */ size = get_bootblock_offset(lar->size) - offset - header_len(name,NULL) - 1; @@ -878,7 +885,7 @@ int ret, hlen; int pathlen; u32 *walk, csum; - u32 offset; + s64 offset; /* Find the beginning of the available space in the LAR */ offset = lar_empty_offset(lar); @@ -886,7 +893,8 @@ /* Figure out how big our header will be */ hlen = header_len(pathname, &pathlen); - if (offset + hlen + complen >= get_bootblock_offset(lar->size)) { + if ((offset < 0) || + (offset + hlen + complen >= get_bootblock_offset(lar->size))) { err("Not enough room in the LAR to add the file.\n"); return -1; }

1 0

r3192 - in trunk/payloads/libpayload: . drivers include libc
by svn＠coreboot.org 28 Mar '08

28 Mar '08

Author: uwe Date: 2008-03-28 00:26:40 +0100 (Fri, 28 Mar 2008) New Revision: 3192 Added: trunk/payloads/libpayload/drivers/cmos.c trunk/payloads/libpayload/libc/lib.c Modified: trunk/payloads/libpayload/Config.in trunk/payloads/libpayload/drivers/Makefile.inc trunk/payloads/libpayload/include/libpayload.h trunk/payloads/libpayload/libc/Makefile.inc Log: Add initial support for some basic CMOS read/write functions and the bcd2dec()/dec2bcd() functions we'll need for (among other things) converting some date/time parameters in CMOS. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Modified: trunk/payloads/libpayload/Config.in =================================================================== --- trunk/payloads/libpayload/Config.in 2008-03-27 20:46:49 UTC (rev 3191) +++ trunk/payloads/libpayload/Config.in 2008-03-27 23:26:40 UTC (rev 3192) @@ -68,6 +68,10 @@ depends VGA_CONSOLE default y +config CMOS + bool "Support for reading/writing CMOS bytes" + default y + endmenu menu "Build Options" Modified: trunk/payloads/libpayload/drivers/Makefile.inc =================================================================== --- trunk/payloads/libpayload/drivers/Makefile.inc 2008-03-27 20:46:49 UTC (rev 3191) +++ trunk/payloads/libpayload/drivers/Makefile.inc 2008-03-27 23:26:40 UTC (rev 3192) @@ -31,3 +31,4 @@ TARGETS-$(CONFIG_SERIAL_CONSOLE) += drivers/serial.o TARGETS-$(CONFIG_VGA_CONSOLE) += drivers/vga.o TARGETS-$(CONFIG_PC_KEYBOARD) += drivers/keyboard.o +TARGETS-$(CONFIG_CMOS) += drivers/cmos.o Added: trunk/payloads/libpayload/drivers/cmos.c =================================================================== --- trunk/payloads/libpayload/drivers/cmos.c (rev 0) +++ trunk/payloads/libpayload/drivers/cmos.c 2008-03-27 23:26:40 UTC (rev 3192) @@ -0,0 +1,69 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Datasheet: + * - Name: MC146818: Real-time Clock Plus RAM (RTC) + * - PDF: http://www.freescale.com/files/microcontrollers/doc/data_sheet/MC146818.pdf + * - Order number: MC146818/D + */ + +/* + * See also: + * http://bochs.sourceforge.net/techspec/CMOS-reference.txt + * http://www.bioscentral.com/misc/cmosmap.htm + */ + +#include <libpayload.h> + +#define RTC_PORT 0x70 + +/** + * Read a byte from the specified CMOS address. + * + * @param addr The CMOS address to read a byte from. + * @return The byte at the given CMOS address. + */ +u8 cmos_read(u8 addr) +{ + outb(addr, RTC_PORT); + return inb(RTC_PORT + 1); +} + +/** + * Write a byte to the specified CMOS address. + * + * @param val The byte to write to CMOS. + * @param addr The CMOS address to write to. + */ +void cmos_write(u8 val, u8 addr) +{ + outb(addr, RTC_PORT); + outb(val, RTC_PORT + 1); +} Modified: trunk/payloads/libpayload/include/libpayload.h =================================================================== --- trunk/payloads/libpayload/include/libpayload.h 2008-03-27 20:46:49 UTC (rev 3191) +++ trunk/payloads/libpayload/include/libpayload.h 2008-03-27 23:26:40 UTC (rev 3192) @@ -41,6 +41,18 @@ #define MAX(a,b) ((a) > (b) ? (a) : (b)) #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) +/* Some CMOS byte definitions */ +#define CMOS_RTC_SECONDS 0 +#define CMOS_RTC_MINUTES 2 +#define CMOS_RTC_HOURS 4 +#define CMOS_RTC_DAY 7 +#define CMOS_RTC_MONTH 8 +#define CMOS_RTC_YEAR 9 + +/* drivers/cmos.c */ +u8 cmos_read(u8 addr); +void cmos_write(u8 val, u8 addr); + /* drivers/keyboard.c */ int keyboard_havechar(void); unsigned char keyboard_get_scancode(void); @@ -87,6 +99,10 @@ void *calloc(size_t nmemb, size_t size); void *realloc(void *ptr, size_t size); +/* libc/lib.c */ +int bcd2dec(int b); +int dec2bcd(int d); + /* libc/memory.c */ void *memset(void *s, int c, size_t n); void *memcpy(void *dst, const void *src, size_t n); Modified: trunk/payloads/libpayload/libc/Makefile.inc =================================================================== --- trunk/payloads/libpayload/libc/Makefile.inc 2008-03-27 20:46:49 UTC (rev 3191) +++ trunk/payloads/libpayload/libc/Makefile.inc 2008-03-27 23:26:40 UTC (rev 3192) @@ -28,5 +28,4 @@ ## TARGETS-y += libc/malloc.o libc/printf.o libc/console.o libc/string.o -TARGETS-y += libc/memory.o libc/ctype.o -TARGETS-y += libc/ipchecksum.o +TARGETS-y += libc/memory.o libc/ctype.o libc/ipchecksum.o libc/lib.o Added: trunk/payloads/libpayload/libc/lib.c =================================================================== --- trunk/payloads/libpayload/libc/lib.c (rev 0) +++ trunk/payloads/libpayload/libc/lib.c 2008-03-27 23:26:40 UTC (rev 3192) @@ -0,0 +1,51 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Convert a number in BCD format to decimal. + * + * @param b The BCD number. + * @return The given BCD number in decimal format. + */ +int bcd2dec(int b) +{ + return ((b >> 4) & 0x0f) * 10 + (b & 0x0f); +} + +/* + * Convert a number in decimal format into the BCD format. + * + * @param d The decimal number. + * @return The given decimal number in BCD format. + */ +int dec2bcd(int d) +{ + return ((d / 10) << 4) | (d % 10); +} +

1 0

[libpayload] Fix drawing chars
by Jordan Crouse 27 Mar '08

27 Mar '08

Somewhere in the layers of functions we're accidently casting unsigned character values as signed, and they are getting sign extended, causing blinking and bold text. This patch makes sure we only use the 8 bits we support right now. This is probably not wchar safe, as the comment says. -- Jordan Crouse Systems Software Development Engineer Advanced Micro Devices, Inc.

2 1

r3191 - trunk/payloads/coreinfo
by svn＠coreboot.org 27 Mar '08

27 Mar '08

Author: uwe Date: 2008-03-27 21:46:49 +0100 (Thu, 27 Mar 2008) New Revision: 3191 Modified: trunk/payloads/coreinfo/Makefile trunk/payloads/coreinfo/coreboot_module.c trunk/payloads/coreinfo/coreinfo.c trunk/payloads/coreinfo/pci_module.c Log: Various tiny fixes (trivial): - Show PCI IDs as 4-digit numbers always. - Cosmetic changes to make UI look more consistent. - Drop MODULE_COUNT #define and use ARRAY_SIZE() where needed. - Small fix to improve build system (create build/ when not there). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/payloads/coreinfo/Makefile =================================================================== --- trunk/payloads/coreinfo/Makefile 2008-03-27 19:11:44 UTC (rev 3190) +++ trunk/payloads/coreinfo/Makefile 2008-03-27 20:46:49 UTC (rev 3191) @@ -66,7 +66,7 @@ include $(src)/.config -all: $(TARGET) +all: prepare $(TARGET) $(TARGET): $(OBJS) $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" Modified: trunk/payloads/coreinfo/coreboot_module.c =================================================================== --- trunk/payloads/coreinfo/coreboot_module.c 2008-03-27 19:11:44 UTC (rev 3190) +++ trunk/payloads/coreinfo/coreboot_module.c 2008-03-27 20:46:49 UTC (rev 3191) @@ -47,30 +47,30 @@ print_module_title(win, "Coreboot Tables"); if (tables_good) { - mvwprintw(win, row++, 2, "No Coreboot tables were found"); + mvwprintw(win, row++, 1, "No Coreboot tables were found"); return 0; } - mvwprintw(win, row++, 2, "Vendor: %s", cb_info.vendor); - mvwprintw(win, row++, 2, "Part: %s", cb_info.part); + mvwprintw(win, row++, 1, "Vendor: %s", cb_info.vendor); + mvwprintw(win, row++, 1, "Part: %s", cb_info.part); - mvwprintw(win, row++, 2, "Version: %s%s", + mvwprintw(win, row++, 1, "Version: %s%s", cb_info.strings[CB_TAG_VERSION - 0x4], cb_info.strings[CB_TAG_EXTRA_VERSION - 0x4]); - mvwprintw(win, row++, 2, "Built: %s (%s(a)%s.%s)", + mvwprintw(win, row++, 1, "Built: %s (%s(a)%s.%s)", cb_info.strings[CB_TAG_BUILD - 0x4], cb_info.strings[CB_TAG_COMPILE_BY - 0x04], cb_info.strings[CB_TAG_COMPILE_HOST - 0x04], cb_info.strings[CB_TAG_COMPILE_DOMAIN - 0x04]); if (cb_info.serial.tag != 0x0) { - mvwprintw(win, row++, 2, "Serial Port I/O base: 0x%x", + mvwprintw(win, row++, 1, "Serial Port I/O base: 0x%x", cb_info.serial.ioport); } if (cb_info.console.tag != 0x0) { - mvwprintw(win, row++, 2, "Default Output Console: "); + mvwprintw(win, row++, 1, "Default Output Console: "); switch (cb_info.console.type) { case CB_TAG_CONSOLE_SERIAL8250: @@ -95,18 +95,18 @@ } row++; - mvwprintw(win, row++, 2, "-- Memory Map --"); + mvwprintw(win, row++, 1, "-- Memory Map --"); for (i = 0; i < cb_info.mem_count; i++) { switch (cb_info.range[i].type) { case CB_MEM_RAM: - mvwprintw(win, row++, 4, " RAM: "); + mvwprintw(win, row++, 3, " RAM: "); break; case CB_MEM_RESERVED: - mvwprintw(win, row++, 4, "Reserved: "); + mvwprintw(win, row++, 3, "Reserved: "); break; case CB_MEM_TABLE: - mvwprintw(win, row++, 4, " Table: "); + mvwprintw(win, row++, 3, " Table: "); } wprintw(win, "%16.16llx - %16.16llx", Modified: trunk/payloads/coreinfo/coreinfo.c =================================================================== --- trunk/payloads/coreinfo/coreinfo.c 2008-03-27 19:11:44 UTC (rev 3190) +++ trunk/payloads/coreinfo/coreinfo.c 2008-03-27 20:46:49 UTC (rev 3191) @@ -26,12 +26,10 @@ extern struct coreinfo_module pci_module; extern struct coreinfo_module coreboot_module; -#define MODULE_COUNT 3 - -struct coreinfo_module *modules[MODULE_COUNT] = { +struct coreinfo_module *modules[] = { &cpuinfo_module, &pci_module, - &coreboot_module + &coreboot_module, }; static WINDOW *modwin; @@ -61,7 +59,7 @@ for (j = 0; j < SCREEN_X; j++) waddch(stdscr, ' '); - for (i = 0; i < MODULE_COUNT; i++) + for (i = 0; i < ARRAY_SIZE(modules); i++) ptr += sprintf(ptr, "F%d: %s ", i + 1, modules[i]->name); mvprintw(23, 0, menu); @@ -127,7 +125,7 @@ if (key >= KEY_F(1) && key <= KEY_F(9)) { unsigned char ch = key - KEY_F(1); - if (ch < MODULE_COUNT) { + if (ch < ARRAY_SIZE(modules)) { curwin = ch; redraw_module(); continue; @@ -167,7 +165,7 @@ refresh(); - for (i = 0; i < MODULE_COUNT; i++) + for (i = 0; i < ARRAY_SIZE(modules); i++) modules[i]->init(); loop(); Modified: trunk/payloads/coreinfo/pci_module.c =================================================================== --- trunk/payloads/coreinfo/pci_module.c 2008-03-27 19:11:44 UTC (rev 3190) +++ trunk/payloads/coreinfo/pci_module.c 2008-03-27 20:46:49 UTC (rev 3191) @@ -156,7 +156,7 @@ else wattrset(win, COLOR_PAIR(2)); - mvwprintw(win, 2 + i, 1, "%X:%2.2X.%2.2X %X:%X ", + mvwprintw(win, 2 + i, 1, "%X:%2.2X.%2.2X %04X:%04X ", bus, devfn, func, devices[item].id & 0xffff, (devices[item].id >> 16) & 0xffff);

1 0

r3190 - trunk/payloads/libpayload
by svn＠coreboot.org 27 Mar '08

27 Mar '08

Author: uwe Date: 2008-03-27 20:11:44 +0100 (Thu, 27 Mar 2008) New Revision: 3190 Modified: trunk/payloads/libpayload/Makefile Log: Drop -Os in libpayload for now, it causes run-time problems for some strange reason (broken curses/VGA display, maybe others). It'll be re-enabled when we fixed that. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/payloads/libpayload/Makefile =================================================================== --- trunk/payloads/libpayload/Makefile 2008-03-25 19:43:01 UTC (rev 3189) +++ trunk/payloads/libpayload/Makefile 2008-03-27 19:11:44 UTC (rev 3190) @@ -61,7 +61,8 @@ INCLUDES := -I./include INCLUDES += -I$(shell $(CC) -print-search-dirs | head -n 1 | cut -d' ' -f2)include -CFLAGS := -Wall -Werror -Os -fno-stack-protector -nostdinc $(INCLUDES) +# TODO: Re-add -Os as soon as we find out why it caused problems. +CFLAGS := -Wall -Werror -fno-stack-protector -nostdinc $(INCLUDES) libpayload.a: $(TARGETS-y) $(AR) rc $@ $(TARGETS-y)

1 0

AMD SimNOW build question
by Marc Karasek 27 Mar '08

27 Mar '08

All, I am running into a problem with LAB on SimNOW. It is booting into Linux but is getting a "linuxrc[1] trap divide error". In troubleshooting so far I have been trying to understand the build process using buildrom for LAB. I see where it creates the initramfs (as a cpio) during the build. Is this supposed to be passed to the kernel as a cpio archive using the CONFIG_INITRAMFS_SOURCE define? In looking at the output from the console, it does not appear that the ramdisk is being setup by the kernel, so when it tries to init() this fails. Any help would be appreciated.... Marc -- ********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 *********************

2 1

Fwd: MIPS Yamon replacement?
by Jake Peavy 27 Mar '08

27 Mar '08

---------- Forwarded message ---------- From: Jake Peavy <djstunks(a)gmail.com> Date: Wed, Mar 26, 2008 at 9:19 PM Subject: Re: [coreboot] MIPS Yamon replacement? To: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Forgot the list... On 3/26/08, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> wrote: > On 26.03.2008 21:05, Jake Peavy wrote: > > Has anyone looked at porting Coreboot onto MIPS architecture? Can it be > > used as a Yamon replacement? > > > > > Nobody has looked into it yet, but we welcome all contributions to > Coreboot, especially for non-x86 architectures. Please note, though, > that the x86 arch (main support area for Coreboot) traditionally has > extremely crappy firmware/BIOS compared to any other architecture. I > have to admit that I just started to read up on Yamon and it roughly > seems to do what we would achieve with a combination of Coreboot and a > payload like OpenFirmware. > > Coreboot is designed to make lowlevel init fast and easy with clean and > well-structured code, supporting diverse payloads. Target settings > (northbridge, southbridge, SuperI/O) are compiled in except for the > usual bus probing stuff. A Coreboot MIPS target could do it all > differently, though. Unfortunately linux-mip.org is down and I could not > find out whether Yamon really tries to support all available hardware > with one binary. That would be impossible in the x86 world due to > inability to probe certain stuff and due to size constraints. > > If you decide to look into Coreboot MIPS support, please don't study > coreboot v2. The coreboot v3 architecture is a lot cleaner because we > learned a lot with previous generations, the code is nicer and we even > have a design document which is reasonably accurate. Of course, if the > MIPS angle shows considerable problems with the current Coreboot v3 > design, we'd be happy to hear about it to improve the design. > > By the way, it would be nice to know how execution starts on MIPS (top > or bottom of address space). I have a patch which adds handling for > bottom-booting architectures to v3, but so far we have seen no use case. > Hi Carl, I'd be interested in trying to help with this effort. It would be certainly be a learning experience for me. If Coreboot has been ported to PPC it might be very similar. Both PPC and MIPS architectures are RISC based, but maybe that's where the similarities end. Based on http://www.mips.com/media/files/MD00103-2B-4KE-SUM-02.04.pdfsection 6.1.5, MIPS execution begins at 0x1FC00000. At least on the MIPS32 core I have ;-) You mentioned payload, is this typically the S1 (MBR) code in x86 arch? -- -jp If you think a weakness can be turned into a strength, I hate to tell you this, but that's another weakness. deepthoughtsbyjackhandy.com

1 0

Re: [coreboot] Code flow from reset vector
by Viswesh S 27 Mar '08

27 Mar '08

On Wed, Mar 26, 2008 at 04:27:11AM -0700, Viswesh S wrote: > I modified the makefile and copied the coreboot before the > stripping to vis_1strip and then did an objdump. ....... >But why are you doing this anyway? Wouldn't it be easier to just look > at the source code? [Viswesh] The source code doesnt give you the functional flow. Taking one example, if we look at entry32.inc, we cant see that the next function is fpu_start. If we dump the elf file we can actually see the next function which is being called, one of the reasons why I looked at the assembly code. I like to understand the assembly code also, but right now the utmost priority is to understand the functional flow. Suppose you modify the linux bios, using linux how do u flash it to the chip ? Do you have in system code for it (or) any tool which does it for you. Is it better that I write code to write the coreboot to the bios chip. Thanks, Viswesh //Peter ____________________________________________________________________________________ Looking for last minute shopping deals? Find them fast with Yahoo! Search. http://tools.search.yahoo.com/newsearch/category.php?category=shopping

2 1

← Newer
1
...
4
5
6
7
8
9
10
...
39
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot March 2008