August 2006 - coreboot - mail.coreboot.org

[LinuxBIOS] r2380 - in trunk/LinuxBIOSv2/src: mainboard/sunw/ultra40 superio/smsc superio/smsc/lpc47m10x
by svn＠openbios.org Aug. 17, 2006

Aug. 17, 2006

Author: rminnich Date: 2006-08-17 22:31:09 +0200 (Thu, 17 Aug 2006) New Revision: 2380 Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/Config.lb trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/chip.h trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x.h trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/superio.c Modified: trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/Config.lb Log: add smsc part. Mod sun board to use smsc part for now Modified: trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/Config.lb 2006-08-16 14:38:00 UTC (rev 2379) +++ trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/Config.lb 2006-08-17 20:31:09 UTC (rev 2380) @@ -207,8 +207,8 @@ chip southbridge/nvidia/ck804 device pci 0.0 on end # HT device pci 1.0 on # LPC - chip superio/smsc/lpc47b397 - device pnp 2e.0 on # Floppy + chip superio/smsc/lpc47m10x + device pnp 2e.0 off # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 @@ -225,24 +225,12 @@ io 0x60 = 0x2f8 irq 0x70 = 3 end - device pnp 2e.7 on # Keyboard + device pnp 2e.7 off # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.8 on # HW Monitor - io 0x60 = 0x290 - chip drivers/generic/generic # LM95221 CPU temp - device i2c 2b on end - end - chip drivers/generic/generic # EMCT03 - device i2c 54 on end - end - end - device pnp 2e.a on # RT - io 0x60 = 0x400 - end end end device pci 1.1 on # SM 0 Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/Config.lb 2006-08-17 20:31:09 UTC (rev 2380) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/chip.h 2006-08-17 20:31:09 UTC (rev 2380) @@ -0,0 +1,10 @@ +struct chip_operations; +extern struct chip_operations superio_smsc_lpc47m10x_ops; + +#include <pc80/keyboard.h> +#include <uart8250.h> + +struct superio_smsc_lpc47m10x_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x.h 2006-08-17 20:31:09 UTC (rev 2380) @@ -0,0 +1,10 @@ +#define LPC47M10X2_FDC 0 /* Floppy */ +#define LPC47M10X2_PP 3 /* Parallel Port */ +#define LPC47M10X2_SP1 4 /* Com1 */ +#define LPC47M10X2_SP2 5 /* Com2 */ +#define LPC47M10X2_KBC 7 /* Keyboard & Mouse */ +#define LPC47M10X2_GAME 9 /* GAME */ +#define LPC47M10X2_PME 10 /* PME reg*/ +#define LPC47M10X2_MPU 10 /* MPE -- who knows -- reg*/ + +#define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c 2006-08-17 20:31:09 UTC (rev 2380) @@ -0,0 +1,69 @@ +/* + * $Header$ + * + * lpc47m10x_early_serial.c: Pre-RAM driver for SMSC LPC47M10X2 Super I/O chip + * derived from lpc47n217 + * + * Copyright (C) 2005 Digital Design Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * $Log$ + * + */ + +#include <arch/romcc_io.h> +#include "lpc47m10x.h" + +//---------------------------------------------------------------------------------- +// Function: pnp_enter_conf_state +// Parameters: dev - high 8 bits = Super I/O port +// Return Value: None +// Description: Enable access to the LPC47M10X2's configuration registers. +// +static inline void pnp_enter_conf_state(device_t dev) { + unsigned port = dev>>8; + outb(0x55, port); +} + +//---------------------------------------------------------------------------------- +// Function: pnp_exit_conf_state +// Parameters: dev - high 8 bits = Super I/O port +// Return Value: None +// Description: Disable access to the LPC47M10X2's configuration registers. +// +static void pnp_exit_conf_state(device_t dev) { + unsigned port = dev>>8; + outb(0xaa, port); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47b272_enable_serial +// Parameters: dev - high 8 bits = Super I/O port, +// low 8 bits = logical device number (per lpc47b272.h) +// iobase - processor I/O port address to assign to this serial device +// Return Value: bool +// Description: Configure the base I/O port of the specified serial device +// and enable the serial device. +// +static void lpc47b272_enable_serial(device_t dev, unsigned iobase) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_conf_state(dev); +} Added: trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/smsc/lpc47m10x/superio.c 2006-08-17 20:31:09 UTC (rev 2380) @@ -0,0 +1,228 @@ +/* + * $Header$ + * + * superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip + * + * Copyright 2000 AG Electronics Ltd. + * Copyright 2003-2004 Linux Networx + * Copyright 2004 Tyan + * Copyright (C) 2005 Digital Design Corporation + * Copyright (C) Ron Minnich, LANL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * $Log$ + * + */ + +#include <arch/io.h> +#include <device/device.h> +#include <device/pnp.h> +#include <console/console.h> +#include <device/smbus.h> +#include <string.h> +#include <bitops.h> +#include <uart8250.h> +#include <pc80/keyboard.h> +#include "chip.h" +#include "lpc47m10x.h" + +// Forward declarations +static void enable_dev(device_t dev); +void lpc47m10x_pnp_set_resources(device_t dev); +void lpc47m10x_pnp_set_resources(device_t dev); +void lpc47m10x_pnp_enable_resources(device_t dev); +void lpc47m10x_pnp_enable(device_t dev); +static void lpc47m10x_init(device_t dev); + +static void pnp_enter_conf_state(device_t dev); +static void pnp_exit_conf_state(device_t dev); +static void dump_pnp_device(device_t dev); + + +struct chip_operations superio_smsc_lpc47m10x_ops = { + CHIP_NAME("smsc lpc47m10x") + .enable_dev = enable_dev +}; + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = lpc47m10x_pnp_set_resources, + .enable_resources = lpc47m10x_pnp_enable_resources, + .enable = lpc47m10x_pnp_enable, + .init = lpc47m10x_init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, LPC47M10X2_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M10X2_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, LPC47M10X2_RT, PNP_IO0, { 0x780, 0 }, }, +}; + +/**********************************************************************************/ +/* PUBLIC INTERFACE */ +/**********************************************************************************/ + +//---------------------------------------------------------------------------------- +// Function: enable_dev +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Create device structures and allocate resources to devices +// specified in the pnp_dev_info array (above). +// +static void enable_dev(device_t dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + pnp_dev_info); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47m10x_pnp_set_resources +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Configure the specified Super I/O device with the resources +// (I/O space, etc.) that have been allocated for it. +// +void lpc47m10x_pnp_set_resources(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_set_resources(dev); + pnp_exit_conf_state(dev); +} + +void lpc47m10x_pnp_enable_resources(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_enable_resources(dev); + pnp_exit_conf_state(dev); +} + +void lpc47m10x_pnp_enable(device_t dev) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + + if(dev->enabled) { + pnp_set_enable(dev, 1); + } + else { + pnp_set_enable(dev, 0); + } + pnp_exit_conf_state(dev); +} + +//---------------------------------------------------------------------------------- +// Function: lpc47m10x_init +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Initialize the specified Super I/O device. +// Devices other than COM ports and the keyboard controller are +// ignored. For COM ports, we configure the baud rate. +// +static void lpc47m10x_init(device_t dev) +{ + struct superio_smsc_lpc47m10x_config *conf = dev->chip_info; + struct resource *res0, *res1; + + if (!dev->enabled) + return; + + switch(dev->path.u.pnp.device) { + case LPC47M10X2_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + + case LPC47M10X2_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + + case LPC47M10X2_KBC: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + } +} + +/**********************************************************************************/ +/* PRIVATE FUNCTIONS */ +/**********************************************************************************/ + +//---------------------------------------------------------------------------------- +// Function: pnp_enter_conf_state +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Enable access to the LPC47M10X2's configuration registers. +// +static void pnp_enter_conf_state(device_t dev) +{ + outb(0x55, dev->path.u.pnp.port); +} + +//---------------------------------------------------------------------------------- +// Function: pnp_exit_conf_state +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Disable access to the LPC47M10X2's configuration registers. +// +static void pnp_exit_conf_state(device_t dev) +{ + outb(0xaa, dev->path.u.pnp.port); +} + +#if 0 +//---------------------------------------------------------------------------------- +// Function: dump_pnp_device +// Parameters: dev - pointer to structure describing a Super I/O device +// Return Value: None +// Description: Print the values of all of the LPC47M10X2's configuration registers. +// NOTE: The LPC47M10X2 must be in configuration mode when this +// function is called. +// +static void dump_pnp_device(device_t dev) +{ + int register_index; + print_debug("\r\n"); + + for(register_index = 0; register_index <= LPC47M10X2_MAX_CONFIG_REGISTER; register_index++) { + uint8_t register_value; + + if ((register_index & 0x0f) == 0) { + print_debug_hex8(register_index); + print_debug_char(':'); + } + + // Skip over 'register' that would cause exit from configuration mode + if (register_index == 0xaa) + register_value = 0xaa; + else + register_value = pnp_read_config(dev, register_index); + + print_debug_char(' '); + print_debug_hex8(register_value); + if ((register_index & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } + + print_debug("\r\n"); +} +#endif

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[LinuxBIOS] Geode GX1 system IRQ handling
by Jonathan Sturges Aug. 16, 2006

Aug. 16, 2006

So I'm back to working on getting LB on my Geode-based MaxTerm 230 thin client again. I've built a test image from the Eaglelion 5bcm target that boots this machine. However, IRQ mapping is not working. I have no doubt that is because the MaxTerm differs from the 5bcm. :-) I'm not entirely sure how to proceed. I know I can create PIRQ tables, but in some posts, I've seen mention that this is outdated and ACPI should be used. Even if I were to build a PIRQ table, the usual method of booting with the system's default BIOS is out of the question. The MaxTerm only ran WinCE 3.0, and has a WinCE BIOS instead of a full PC BIOS. Unless someone knows of a WinCE system inspection tool that might reveal the IRQ assignments. Advice appreciated.... thanks, Jonathan

4 23

[LinuxBIOS] r2379 - trunk/LinuxBIOSv2/src/northbridge/amd/gx1
by svn＠openbios.org Aug. 16, 2006

Aug. 16, 2006

Author: rminnich Date: 2006-08-16 16:38:00 +0200 (Wed, 16 Aug 2006) New Revision: 2379 Modified: trunk/LinuxBIOSv2/src/northbridge/amd/gx1/northbridge.c Log: updates to make gx1 IRQ map work. not tested; signed-off-by: Ronald G. Minnich Modified: trunk/LinuxBIOSv2/src/northbridge/amd/gx1/northbridge.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/amd/gx1/northbridge.c 2006-08-16 14:22:10 UTC (rev 2378) +++ trunk/LinuxBIOSv2/src/northbridge/amd/gx1/northbridge.c 2006-08-16 14:38:00 UTC (rev 2379) @@ -10,6 +10,7 @@ #include "chip.h" #include "northbridge.h" #include <cpu/amd/gx1def.h> +#include <cpu/x86/cache.h> #define NORTHBRIDGE_FILE "northbridge.c" /* @@ -24,9 +25,18 @@ pci_write_config8(dev, 0x44, 0x00); } +/** + * Enables memory from 0xC0000 up to 0xFFFFF. + * So this region is read/write and cache able + * + * FIXME: What about PCI master access into + * this region? + **/ + static void enable_shadow(device_t dev) { - + writel(0x77777777,GX_BASE+BC_XMAP_2); + writel(0x77777777,GX_BASE+BC_XMAP_3); } static void northbridge_init(device_t dev) @@ -35,6 +45,8 @@ optimize_xbus(dev); enable_shadow(dev); + printk_spew("Calling enable_cache()\n"); + enable_cache(); } @@ -180,7 +192,8 @@ static void cpu_bus_init(device_t dev) { - initialize_cpus(&dev->link[0]); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + initialize_cpus(&dev->link[0]); } static void cpu_bus_noop(device_t dev) @@ -197,14 +210,19 @@ static void enable_dev(struct device *dev) { + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + printk_spew("DEVICE_PATH_PCI_DOMAIN\n"); dev->ops = &pci_domain_ops; pci_set_method(dev); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { + printk_spew("DEVICE_PATH_APIC_CLUSTER\n"); dev->ops = &cpu_bus_ops; - } + } else { + printk_spew("device path type %d\n",dev->path.type); + } } struct chip_operations northbridge_amd_gx1_ops = {

1 0

[LinuxBIOS] r2378 - in trunk/LinuxBIOSv2/src/cpu/amd: model_gx2 model_lx
by svn＠openbios.org Aug. 16, 2006

Aug. 16, 2006

Author: stepan Date: 2006-08-16 16:22:10 +0200 (Wed, 16 Aug 2006) New Revision: 2378 Modified: trunk/LinuxBIOSv2/src/cpu/amd/model_gx2/vsmsetup.c trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c Log: share decompression code. Modified: trunk/LinuxBIOSv2/src/cpu/amd/model_gx2/vsmsetup.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/amd/model_gx2/vsmsetup.c 2006-08-15 13:52:51 UTC (rev 2377) +++ trunk/LinuxBIOSv2/src/cpu/amd/model_gx2/vsmsetup.c 2006-08-16 14:22:10 UTC (rev 2378) @@ -11,92 +11,8 @@ * was done, but can't fix it yet. RGM */ #warning "Fix the uncompress once linuxbios knows how to do it" -// This GETBIT is supposed to work on little endian -// 32bit systems. The algorithm will definitely need -// some fixing on other systems, but it might not be -// a problem since the nrv2b binary behaves the same.. +#include "../lib/nrv2b.c" -#ifndef ENDIAN -#define ENDIAN 0 -#endif -#ifndef BITSIZE -#define BITSIZE 32 -#endif - -#define GETBIT_8(bb, src, ilen) \ - (((bb = bb & 0x7f ? bb*2 : ((unsigned)src[ilen++]*2+1)) >> 8) & 1) - -#define GETBIT_LE16(bb, src, ilen) \ - (bb*=2,bb&0xffff ? (bb>>16)&1 : (ilen+=2,((bb=(src[ilen-2]+src[ilen-1]*256u)*2+1)>>16)&1)) -#define GETBIT_LE32(bb, src, ilen) \ - (bc > 0 ? ((bb>>--bc)&1) : (bc=31,\ - bb=*(const uint32_t *)((src)+ilen),ilen+=4,(bb>>31)&1)) - -#if ENDIAN == 0 && BITSIZE == 8 -#define GETBIT(bb, src, ilen) GETBIT_8(bb, src, ilen) -#endif -#if ENDIAN == 0 && BITSIZE == 16 -#define GETBIT(bb, src, ilen) GETBIT_LE16(bb, src, ilen) -#endif -#if ENDIAN == 0 && BITSIZE == 32 -#define GETBIT(bb, src, ilen) GETBIT_LE32(bb, src, ilen) -#endif - -static unsigned long unrv2b(uint8_t * src, uint8_t * dst) -{ - unsigned long ilen = 0, olen = 0, last_m_off = 1; - uint32_t bb = 0; - unsigned bc = 0; - const uint8_t *m_pos; - unsigned long file_len = *(unsigned long *) src; - - printk_debug("compressed file len is supposed to be %d bytes\n", file_len); - // skip length - src += 4; - /* FIXME: check olen with the length stored in first 4 bytes */ - - for (;;) { - unsigned int m_off, m_len; - while (GETBIT(bb, src, ilen)) { - dst[olen++] = src[ilen++]; - } - - m_off = 1; - do { - m_off = m_off * 2 + GETBIT(bb, src, ilen); - } while (!GETBIT(bb, src, ilen)); - if (m_off == 2) { - m_off = last_m_off; - } else { - m_off = (m_off - 3) * 256 + src[ilen++]; - if (m_off == 0xffffffffU) - break; - last_m_off = ++m_off; - } - - m_len = GETBIT(bb, src, ilen); - m_len = m_len * 2 + GETBIT(bb, src, ilen); - if (m_len == 0) { - m_len++; - do { - m_len = m_len * 2 + GETBIT(bb, src, ilen); - } while (!GETBIT(bb, src, ilen)); - m_len += 2; - } - m_len += (m_off > 0xd00); - - m_pos = dst + olen - m_off; - dst[olen++] = *m_pos++; - do { - dst[olen++] = *m_pos++; - } while (--m_len > 0); - } - - printk_debug("computed len is %d, file len is %d\n", olen, file_len); - return olen; - -} - /* vsmsetup.c derived from vgabios.c. Derived from: */ /*------------------------------------------------------------ -*- C -*- Modified: trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c 2006-08-15 13:52:51 UTC (rev 2377) +++ trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c 2006-08-16 14:22:10 UTC (rev 2378) @@ -11,92 +11,8 @@ * was done, but can't fix it yet. RGM */ #warning "Fix the uncompress once linuxbios knows how to do it" -// This GETBIT is supposed to work on little endian -// 32bit systems. The algorithm will definitely need -// some fixing on other systems, but it might not be -// a problem since the nrv2b binary behaves the same.. +#include "../lib/nrv2b.c" -#ifndef ENDIAN -#define ENDIAN 0 -#endif -#ifndef BITSIZE -#define BITSIZE 32 -#endif - -#define GETBIT_8(bb, src, ilen) \ - (((bb = bb & 0x7f ? bb*2 : ((unsigned)src[ilen++]*2+1)) >> 8) & 1) - -#define GETBIT_LE16(bb, src, ilen) \ - (bb*=2,bb&0xffff ? (bb>>16)&1 : (ilen+=2,((bb=(src[ilen-2]+src[ilen-1]*256u)*2+1)>>16)&1)) -#define GETBIT_LE32(bb, src, ilen) \ - (bc > 0 ? ((bb>>--bc)&1) : (bc=31,\ - bb=*(const uint32_t *)((src)+ilen),ilen+=4,(bb>>31)&1)) - -#if ENDIAN == 0 && BITSIZE == 8 -#define GETBIT(bb, src, ilen) GETBIT_8(bb, src, ilen) -#endif -#if ENDIAN == 0 && BITSIZE == 16 -#define GETBIT(bb, src, ilen) GETBIT_LE16(bb, src, ilen) -#endif -#if ENDIAN == 0 && BITSIZE == 32 -#define GETBIT(bb, src, ilen) GETBIT_LE32(bb, src, ilen) -#endif - -static unsigned long unrv2b(uint8_t * src, uint8_t * dst) -{ - unsigned long ilen = 0, olen = 0, last_m_off = 1; - uint32_t bb = 0; - unsigned bc = 0; - const uint8_t *m_pos; - unsigned long file_len = *(unsigned long *) src; - - printk_debug("compressed file len is supposed to be %d bytes\n", file_len); - // skip length - src += 4; - /* FIXME: check olen with the length stored in first 4 bytes */ - - for (;;) { - unsigned int m_off, m_len; - while (GETBIT(bb, src, ilen)) { - dst[olen++] = src[ilen++]; - } - - m_off = 1; - do { - m_off = m_off * 2 + GETBIT(bb, src, ilen); - } while (!GETBIT(bb, src, ilen)); - if (m_off == 2) { - m_off = last_m_off; - } else { - m_off = (m_off - 3) * 256 + src[ilen++]; - if (m_off == 0xffffffffU) - break; - last_m_off = ++m_off; - } - - m_len = GETBIT(bb, src, ilen); - m_len = m_len * 2 + GETBIT(bb, src, ilen); - if (m_len == 0) { - m_len++; - do { - m_len = m_len * 2 + GETBIT(bb, src, ilen); - } while (!GETBIT(bb, src, ilen)); - m_len += 2; - } - m_len += (m_off > 0xd00); - - m_pos = dst + olen - m_off; - dst[olen++] = *m_pos++; - do { - dst[olen++] = *m_pos++; - } while (--m_len > 0); - } - - printk_debug("computed len is %d, file len is %d\n", olen, file_len); - return olen; - -} - /* vsmsetup.c derived from vgabios.c. Derived from: */ /*------------------------------------------------------------ -*- C -*-

1 0

[LinuxBIOS] LinuxBIOS Symposium '06 Europe
by Stefan Reinauer Aug. 16, 2006

Aug. 16, 2006

Dear LinuxBIOS community, join the firmware revolution! This year's LinuxBIOS symposium will take place on October 1-3 in Hamburg, Germany. We cordially invite you to participate. Expect to meet interesting people from all over the world, thrilling topics and exciting talks and discussion about LinuxBIOS. Among the topics you will find: * Breaking news since the LinuxBIOS summit 2005 * The future: LinuxBIOS v3 * Development Guidelines and Quality Assurance * LinuxBIOS feat. MIT's One Laptop Per Child If you are interested in additional topics or want to talk on the symposium, please send us an email to symposium(a)coresystems.de. Registration is possible until September 10th using the registration form at http://linuxbios.eu/. The website also provides details on the event. We are looking forward to meeting all of you. Our venue is Hamburg, an intriguing green metropolis in Germany's North where history and modernity, nature and culture meet back-to-back. The famous Hamburg harbor, numerous parks, nifty arcades, manifold restaurants and a great nightlife -- Take a chance to explore this very nice city alongside the symposium! Hamburg has an international airport and is also easily accessible via train. Find more information about the city at http://www.hamburg.de/ and http://en.wikipedia.org/wiki/Hamburg The symposium will (presumably) take place in the Speicherstadt, an ancient brick-built warehouse complex. The Speicherstadt is the historical center of the port of Hamburg. Still today the smell of roasted coffee and exotic spices lies in the air, experience unforgettable events in an authentic hanseatic setting. You can see pictures of the Speicherstadt here: * http://linuxbios.eu/speicherstadt.jpg * http://commons.wikimedia.org/wiki/Category:Speicherstadt Vendors on this list, if you have something you'd like to talk about, please get back to me. Go register today! Thanks, Stefan Reinauer coresystems GmbH -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/

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[LinuxBIOS] LinuxBIOS r2377 build changes
by LinuxBIOS information Aug. 15, 2006

Aug. 15, 2006

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2377 to the LinuxBIOS source repository and caused the following changes: Change Log: this file is already included by auto.c on all targets. Build Log: Compilation of artecgroup:dbe61 has been fixed. If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2377 - trunk/LinuxBIOSv2/src/southbridge/amd/cs5536
by svn＠openbios.org Aug. 15, 2006

Aug. 15, 2006

Author: stepan Date: 2006-08-15 15:52:51 +0200 (Tue, 15 Aug 2006) New Revision: 2377 Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536_early_setup.c Log: this file is already included by auto.c on all targets. Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536_early_setup.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536_early_setup.c 2006-08-12 22:03:36 UTC (rev 2376) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536_early_setup.c 2006-08-15 13:52:51 UTC (rev 2377) @@ -1,4 +1,3 @@ -#include <cpu/amd/gx2def.h> /* *

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[LinuxBIOS] smsc dme1737 data book -- anybody got it?
by Ronald G Minnich Aug. 14, 2006

Aug. 14, 2006

smsc appears not to have the data sheets for dme1737. All I can find is a 6-page useless document. Anyone seen a data sheet for this part? ron

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[LinuxBIOS] LinuxBIOS r2376 build changes
by LinuxBIOS information Aug. 12, 2006

Aug. 12, 2006

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2376 to the LinuxBIOS source repository and caused the following changes: Change Log: update license template. Build Log: Compilation of artecgroup:dbe61 is still broken. If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2376 - trunk/LinuxBIOSv2
by svn＠openbios.org Aug. 12, 2006

Aug. 12, 2006

Author: stepan Date: 2006-08-13 00:03:36 +0200 (Sun, 13 Aug 2006) New Revision: 2376 Modified: trunk/LinuxBIOSv2/COPYING Log: update license template. Modified: trunk/LinuxBIOSv2/COPYING =================================================================== --- trunk/LinuxBIOSv2/COPYING 2006-08-11 23:48:14 UTC (rev 2375) +++ trunk/LinuxBIOSv2/COPYING 2006-08-12 22:03:36 UTC (rev 2376) @@ -1,9 +1,8 @@ - GNU GENERAL PUBLIC LICENSE Version 2, June 1991 - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. @@ -16,7 +15,7 @@ General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by -the GNU Library General Public License instead.) You can apply it to +the GNU Lesser General Public License instead.) You can apply it to your programs, too. When we speak of free software, we are referring to freedom, not @@ -56,7 +55,7 @@ The precise terms and conditions for copying, distribution and modification follow. - + GNU GENERAL PUBLIC LICENSE TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION @@ -111,7 +110,7 @@ License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.) - + These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in @@ -169,7 +168,7 @@ access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code. - + 4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License. Any attempt otherwise to copy, modify, sublicense or distribute the Program is @@ -226,7 +225,7 @@ This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License. - + 8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License @@ -279,9 +278,9 @@ POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS - - Appendix: How to Apply These Terms to Your New Programs + How to Apply These Terms to Your New Programs + If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. @@ -292,7 +291,7 @@ the "copyright" line and a pointer to where the full notice is found. <one line to give the program's name and a brief idea of what it does.> - Copyright (C) 19yy <name of author> + Copyright (C) <year> <name of author> This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -304,16 +303,16 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: - Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. @@ -336,5 +335,5 @@ This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Library General +library. If this is what you want to do, use the GNU Lesser General Public License instead of this License.

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