coreboot September 2002

coreboot@coreboot.org

57 participants
84 discussions

getting DMA to work (non-linux bios related)
by GNUOrder 23 Sep '02

23 Sep '02

I was working on trying to get this box to turn on DMA for the drives and we get an error: We used the stock 2.4.18-3smp kernel from redhat 7.3 and also 2.4.19 from source. The motherboard is a dual P4 tyan, I didn't catch the model number. We double checked the DMA settings and enabled an ugly hack (their term), still no go. From what it looks like, there is something with the ide controller at boot time that prevents the kernel from being able to set DMA. >From lspci: 00:1f.1 IDE interface: Intel Corp. 82801CA IDE U100 (rev 02) >From dmesg: PCI: Device 00:1f.1 not available because of resource collisions ICH3: (ide_setup_pci_device:) Could not enable device. Does this look like a problem with BIOS or could this chipset be one that linux doesn't fully support yet? The customer bought it and had it sent to the server farm that will be hosting it so its not available to either of us. Yes, I know, why aren't we using scsi for a server. I would if I could. GO <Jerle> [root@taenaria root]# hdparm -d1 /dev/hda <Jerle> /dev/hda: <Jerle> setting using_dma to 1 (on) <Jerle> HDIO_SET_DMA failed: Operation not permitted <Jerle> using_dma = 0 (off) <Jerle> [root@taenaria root]# <[GNU]Order> type lspci <Jerle> [root@taenaria root]# lspci <Jerle> 00:00.0 Host bridge: Intel Corp. e7500 DRAM Controller (rev 02) <Jerle> 00:02.0 PCI bridge: Intel Corp. e7500 HI_B Virtual PCI-to-PCI Bridge (F0) (rev 02) <Jerle> 00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub (rev 02) <Jerle> 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA PCI Bridge (rev 42) <Jerle> 00:1f.0 ISA bridge: Intel Corp. 82801CA ISA Bridge (LPC) (rev 02) <Jerle> 00:1f.1 IDE interface: Intel Corp. 82801CA IDE U100 (rev 02) <Jerle> 00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus (rev 02) <Jerle> 01:02.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) <Jerle> 01:03.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 0c) <Jerle> 02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 03) <Jerle> 02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 03) <Jerle> 02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 03) <Jerle> 02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 03) <Jerle> 04:01.0 Ethernet controller: Intel Corp. 82544EI Gigabit Ethernet Controller (rev 02) <Jerle> PCI: Device 00:1f.1 not available because of resource collisions <Jerle> ICH3: (ide_setup_pci_device:) Could not enable device. <[GNU]Order> with lspci you got that last error? <Jerle> no, that was out of the dmesg <[GNU]Order> oh <Jerle> Just reprinting for reference. <[GNU]Order> the resource collisions one too? <Jerle> yes

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PCchips ES8m
by Justin Cormack 23 Sep '02

23 Sep '02

Does anyone know anything about this? http://www.pcchips.com.tw/ES8m.html it appears to be SiS 5598 chipset, similar size to the VIA EPIA. No idea what type of performance the RiSE MP6 has. Is there Linuxbios support? (Ollie?) Is it actually shipping? Justin

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My system's LCPI report
by Angelo Arifi 23 Sep '02

23 Sep '02

Ok I did lspci -vv on my baby and well i saved the output in a text, and of course it is attached :) Also how would this function, knowing that i have linux and windows dual boot now, if i flashed my BIOS it would boot into linux only right? (ya i'd say right? lol hence the 'linuxbios' heh) Thanks guys, i find this project VERY interesting, i wish i had another computer to experiment on as well. ----------------------------------- Angelo "Gigatron" Arifi

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Re: sis630 mac address
by Andre Dias 22 Sep '02

22 Sep '02

>Anybody (ollie?) know if there is a way to re-write the eeprom? The >ifconfig command will set the mac to any value but it doesn't last through >reboots, and I did not see any code in the driver that appears to write to >the eeprom. There is a dos utility in pcchips.com site to reprogram the mac address. andre http://usuarios.uninet.com.br/~aod ----------------------------------------------

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port into x86 HOWTO ?
by Karthik Bala Guru 22 Sep '02

22 Sep '02

Hi, Actually i am trying to port rtlinux into a x86 board . that board has our own BIOS . the BIOS supports only upto 200 KB memory . I have RTlinux ported into a floppy to around 500 KB. I am ready to port into that X86 board , but our BIOS's drawback makes me to wait till the BIOS is made to support upto atleast 800 KB. and this is about to consume many weeks. I came across LINUXBIOS ..... Will this able to replace the BIOS problem that i have with porting into the X86 baord ?? How to start with ??? Some clear steps plz ..... ????? Do i require a MONITOR prg ? Is it possible to port my minimised RTlinux into the X86 board with the use of linuxbios ????? Help me out ! karthik bala guru Yahoo! Properties Special Buy, sell, rent...your flat, or even post an ad

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porting rtlinux into x86 ??
by Karthik Bala Guru 22 Sep '02

22 Sep '02

Hi, Actually i am trying to port rtlinux into a x86 board . that board has our own BIOS . the BIOS supports only upto 200 KB memory . I have RTlinux ported into a floppy to around 500 KB. I am ready to port into that X86 board , but our BIOS's drawback makes me to wait till the BIOS is made to support upto atleast 800 KB. and this is about to consume many weeks. I came across LINUXBIOS ..... Will this able to replace the BIOS problem that i have with porting into the X86 baord ?? How to start with ??? Some clear steps plz ..... ????? Do i require a MONITOR prg ? Is it possible to port my minimised RTlinux into the X86 board with the use of linuxbios ????? Help me out ! karthik bala guru ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com

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Linuxbios for VIA EPIA motherboards?
by Nicholas Mistry 22 Sep '02

22 Sep '02

I was wondering what is the status of the support on VIA EPIA motherboards w/ LinuxBIOS. I have dug through the archives quite a bit, and found that there has been someintrest w/ supporting the boards. Unfortunately i have not found any information as to howfar along it has gone. Thanks -Nick

3 3

DOC on EPIA-800 motherboard
by Nicholas Mistry 21 Sep '02

21 Sep '02

After reading over my manual, i discovered that the EPIA-800 has a DOC option. After looking onthe motherboard, it seems that all that is required is a surface mount flash chip. Anyone know what kind of chip can be used here? And how does one access it? I have a few 32 or 64 Mbit Intel flash chips laying around from my Assabet days. It would be nice to drop one of those on,and take advantage of it. -N

1 0

Modern GPU programming
by Peter Stuge 21 Sep '02

21 Sep '02

Hi! I found this on the sourceforge page about xbox-linux. It briefly discusses the capabilities of a modern graphics processing unit, specifically the nVidia model found in Xboxes. It also shows how to set up 80x25 text mode on these chips. This should be useful information for the LinuxBIOS project as well. http://xbox-linux.sourceforge.net/articles.php?aid=2002181091439 Basically it contains this code: void crtcout(unsigned char reg, unsigned char data) { /* a single 16 bit access might also work */ _asm { mov al, reg mov ebx, 0xFD6013d4 mov [ebx], al mov al, data mov 1[ebx], al } } void settextmode() { crtcout(0x00, 0x5F); crtcout(0x01, 0x4F); crtcout(0x04, 0x54); crtcout(0x05, 0x80); crtcout(0x07, 0x1F); crtcout(0x10, 0x9C); crtcout(0x17, 0xA3); } crtcout() uses MMIO to access the CRTC registers since legacy IO is disabled in the Xbox. The MMIO memory region is programmed into the GPU by the BIOS. (0xFD000000 with vanilla Xbox kernel) However, the offset of the CRTC in this memory region is "magic" and probably only known by the chipset manufacturer, unless reverse engineered. The web page also mentions the need to set up a font on that particular hardware, however most PC graphics cards should already have a font onboard, right? Anyway, I thought this might be of interest to members of this list. //Peter

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BIOS Tweaking?
by Adam Hunt 20 Sep '02

20 Sep '02

A link on Slashdot to an article at Ars Technica (http://arstechnica.com/guide/building/bios/bios-1.html) about BIOS tweaking got me thinking. Is it possible to modify things things the BIOS has traditionally initialized. Thinks like CAS timing, RAS-to-CAS, and even things like clocking options like processor and PCI multipliers. --adam -- GMX - Die Kommunikationsplattform im Internet. http://www.gmx.net

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coreboot September 2002