[S] Change in coreboot[master]: arch/x86: Fixes for getting actual physical address bits

[Cliff Huang (Code Review)]

Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77613?usp=email )

Change subject: arch/x86: Fixes for getting actual physical address bits
......................................................................

arch/x86: Fixes for getting actual physical address bits

Add cpu_max_phys_address_size() to get the physical address bits
without being taking by any new features.
cpu_phys_address_size() is now returning the actual bits by
considering reserved bits taken by enabled SOC/CPU features.

BUG=288978352
TEST=NA; This can not be tested alone.

Signed-off-by: Cliff Huang 
Change-Id: I9504a489782ab6ef8950a8631c269ed39c63f34d
---
M src/arch/x86/cpu_common.c
M src/include/cpu/cpu.h
2 files changed, 32 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/77613/1

diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c
index e674afa..9dcc951 100644
--- a/src/arch/x86/cpu_common.c
+++ b/src/arch/x86/cpu_common.c
@@ -3,6 +3,8 @@
 #include <cpu/cpu.h>
 #include <types.h>

+uint32_t get_reserved_address_bits(void);
+
 #if ENV_X86_32
 /* Standard macro to see if a specific flag is changeable */
 static inline int flag_is_changeable_p(uint32_t flag)
@@ -44,13 +46,40 @@
    return cpuid_eax(0x80000000);
 }

+/*
+ * NOTE: cpu_phys_address_size() should be called after CPU features
+ * has been configured, where SOC capabilities are checked and
+ * features are enabled in the MSRs according to the platform. For
+ * instance, MK-TME. Use cpu_max_phys_address_size() to get
+ * the maximum address bit size.
+ */
+int cpu_max_phys_address_size(void)
+{
+	if (!(cpu_have_cpuid()))
+		return 32;
+
+	if (cpu_cpuid_extended_level() >= 0x80000008) {
+		return (cpuid_eax(0x80000008) & 0xff);
+	}
+
+	if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
+		return 36;
+	return 32;
+}
+
+/*
+ * This function is implemented in the SOC-specific cpu lib.
+ */
+uint32_t __weak get_reserved_address_bits(void) { return 0; }
+
 int cpu_phys_address_size(void)
 {
    if (!(cpu_have_cpuid()))
    	return 32;

-	if (cpu_cpuid_extended_level() >= 0x80000008)
-		return cpuid_eax(0x80000008) & 0xff;
+	if (cpu_cpuid_extended_level() >= 0x80000008) {
+		return (cpuid_eax(0x80000008) & 0xff) - get_reserved_address_bits();
+	}

if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
    	return 36;
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index fc662ee..482f26e 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -9,6 +9,7 @@
 void cpu_initialize(void);
 uintptr_t cpu_get_lapic_addr(void);
 struct bus;
+int cpu_max_phys_address_size(void);
 int cpu_phys_address_size(void);

#if ENV_RAMSTAGE