New patch to review for coreboot: 1b82969 timestamps: Stash early timestamps in CAR_GLOBAL
Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3910
-gerrit
commit 1b82969bde24d4254b5e5783e34abb31539449bb Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Sat Sep 7 20:26:36 2013 +0300
timestamps: Stash early timestamps in CAR_GLOBAL
Change-Id: I87b454c748cf885491d5b38bfe53a2ec0e9f38c5 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/cpu/intel/haswell/romstage.c | 29 +++++++------------------- src/lib/timestamp.c | 21 ++++++++++++------- src/mainboard/emulation/qemu-i440fx/romstage.c | 4 ++-- src/mainboard/emulation/qemu-q35/romstage.c | 4 ++-- src/mainboard/google/butterfly/romstage.c | 26 +++++------------------ src/mainboard/google/link/romstage.c | 26 +++++------------------ src/mainboard/google/parrot/romstage.c | 26 +++++------------------ src/mainboard/google/stout/romstage.c | 26 +++++------------------ src/mainboard/intel/emeraldlake2/romstage.c | 26 +++++------------------ src/mainboard/kontron/ktqm77/romstage.c | 26 +++++------------------ src/mainboard/lenovo/t60/romstage.c | 26 +++++------------------ src/mainboard/lenovo/x60/romstage.c | 26 +++++------------------ src/mainboard/samsung/lumpy/romstage.c | 26 +++++------------------ src/mainboard/samsung/stumpy/romstage.c | 26 +++++------------------ src/mainboard/via/epia-m850/romstage.c | 16 +++++--------- src/northbridge/via/vx900/Makefile.inc | 1 - 16 files changed, 79 insertions(+), 256 deletions(-)
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 06e3a85..e62b894 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -200,16 +200,8 @@ void romstage_common(const struct romstage_params *params) int wake_from_s3; struct romstage_handoff *handoff;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif - -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (params->bist == 0) enable_lapic(); @@ -249,17 +241,15 @@ void romstage_common(const struct romstage_params *params)
post_code(0x3a); params->pei_data->boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM);
report_platform_info();
sdram_initialize(params->pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); + post_code(0x3b);
intel_early_me_status(); @@ -288,13 +278,8 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif }
static inline void prepare_for_resume(struct romstage_handoff *handoff) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 7e2f701..eac33a2 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -114,7 +114,10 @@ static void timestamp_do_sync(void)
void timestamp_init(tsc_t base) { -#ifndef __PRE_RAM__ +#ifdef __PRE_RAM__ + /* Copy of basetime, it is too early for CBMEM. */ + ts_basetime = base; +#else struct timestamp_table* tst;
/* Locate and use an already existing table. */ @@ -123,19 +126,21 @@ void timestamp_init(tsc_t base) ts_table = tst; return; } -#endif
+ /* Copy of basetime, may be too early for CBMEM. */ + ts_basetime = base; timestamp_real_init(base); - if (ts_table) - timestamp_do_sync(); - else - ts_basetime = base; +#endif }
-#ifndef __PRE_RAM__ void timestamp_sync(void) { +#ifdef __PRE_RAM__ + timestamp_real_init(ts_basetime); +#else if (!ts_table) timestamp_init(ts_basetime); -} #endif + if (ts_table) + timestamp_do_sync(); +} diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 413f745..70c7202 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -49,10 +49,10 @@ void main(unsigned long bist) //dump_pci_devices();
cbmem_was_initted = !cbmem_initialize(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(rdtsc()); + timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index e9cd801..abc9474 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -51,10 +51,10 @@ void main(unsigned long bist) //dump_pci_devices();
cbmem_was_initted = !cbmem_initialize(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(rdtsc()); + timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 554df83..670fc00 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -118,12 +118,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -170,9 +164,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -237,14 +230,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c);
rcba_config(); @@ -284,13 +273,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index ad4da84..aaecfc6 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -154,12 +154,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -206,9 +200,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -280,14 +273,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c);
rcba_config(); @@ -327,13 +316,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 79f9c2a..444386f 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -119,12 +119,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -171,9 +165,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -238,14 +231,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c);
rcba_config(); @@ -285,13 +274,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 80de53d..36a5637 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -158,12 +158,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -215,9 +209,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -287,14 +280,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3b); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -342,13 +331,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index bb47cb8..09dc60b 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -170,12 +170,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -220,9 +214,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -286,14 +279,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3b); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -339,13 +328,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index f78e293..22fff42 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -156,12 +156,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -216,9 +210,8 @@ void main(unsigned long bist) pcie_init: 1, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -289,14 +282,10 @@ void main(unsigned long bist)
post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c);
rcba_config(); @@ -333,13 +322,8 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 79a2988..42514e3 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -212,16 +212,9 @@ void main(unsigned long bist) int cbmem_was_initted; const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -291,13 +284,9 @@ void main(unsigned long bist) dump_spd_registers(); #endif
-#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_mode, spd_addrmap); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */ early_ich7_init(); @@ -354,13 +343,8 @@ void main(unsigned long bist) } #endif
-#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif
#if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index ec4c00c..97317f8 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -219,16 +219,9 @@ void main(unsigned long bist) int cbmem_was_initted; const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -293,13 +286,9 @@ void main(unsigned long bist) dump_spd_registers(); #endif
-#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_mode, spd_addrmap); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */ early_ich7_init(); @@ -358,13 +347,8 @@ void main(unsigned long bist) } #endif
-#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif
#if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 1a17949..d7b165b 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -137,12 +137,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -192,9 +186,8 @@ void main(unsigned long bist) spd_blob *spd_data;
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -307,14 +300,10 @@ void main(unsigned long bist)
post_code(0x39); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3a); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -358,13 +347,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 1169732..b0ac5a8 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -173,12 +173,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts;
-#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -223,9 +217,8 @@ void main(unsigned long bist) }, };
-#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE);
if (bist == 0) enable_lapic(); @@ -315,14 +308,10 @@ void main(unsigned long bist)
post_code(0x39); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3a); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -365,13 +354,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 364de48..8da3838 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -20,8 +20,6 @@ /* * Inspired from the EPIA-M700 */ -#undef CONFIG_COLLECT_TIMESTAMPS -#define CONFIG_COLLECT_TIMESTAMPS 1 #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> @@ -61,7 +59,7 @@ void main(unsigned long bist) { u32 tolm; u64 start, end; - tsc_t tsc_at_romstage_start = rdtsc(); + timestamp_add_now(TS_START_ROMSTAGE);
/* First thing we need to do on the VX900, before anything else */ vx900_enable_pci_config_space(); @@ -83,13 +81,13 @@ void main(unsigned long bist) /* Oh, almighty, give us the SMBUS */ enable_smbus();
- tsc_t tsc_before_raminit = rdtsc(); + timestamp_add_now(TS_BEFORE_INITRAM); /* Now we can worry about raminit. * This board only has DDR3, so no need to worry about which DRAM type * to use */ dimm_layout dimms = { {0x50, 0x51, SPD_END_LIST} }; vx900_init_dram_ddr3(&dimms); - tsc_t tsc_after_raminit = rdtsc(); + timestamp_add_now(TS_AFTER_INITRAM);
/* TODO: All these ram_checks are here to ensure we test most of the RAM * below 4G. They should not be needed once VX900 raminit is stable */ @@ -106,15 +104,11 @@ void main(unsigned long bist) ram_check(2048 << 20, 0x80);
print_debug("We passed RAM verify\n"); -#ifdef GONFIG_EARLY_CBMEM_INIT + /* We got RAM working, now we can write the timestamps to RAM */ cbmem_initialize(); - timestamp_init(tsc_at_romstage_start); - timestamp_add(TS_START_ROMSTAGE, tsc_at_romstage_start); - timestamp_add(TS_BEFORE_INITRAM, tsc_before_raminit); - timestamp_add(TS_AFTER_INITRAM, tsc_after_raminit); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif /* FIXME: See if this is needed or take this out please */ /* Disable Memcard and SDIO */ pci_mod_config8(LPC, 0x51, 0, (1 << 7) | (1 << 4)); diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc index 13d7de6..15fd859 100644 --- a/src/northbridge/via/vx900/Makefile.inc +++ b/src/northbridge/via/vx900/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += ./../../../southbridge/via/common/early_smbus_print_error.c romstage-y += ./../../../southbridge/via/common/early_smbus_reset.c romstage-y += ./../../../southbridge/via/common/early_smbus_wait_until_ready.c romstage-y += ./../../../drivers/pc80/udelay_io.c -romstage-$(CONFIG_COLLECT_TIMESTAMPS) += ./../../../lib/cbmem.c
ramstage-y += pci_util.c ramstage-y += pcie.c
-
Kyösti Mälkki