New patch to review for coreboot: mb/intel/d510mo: DSDT fix

[Damien Zammit]

Damien Zammit ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13453

-gerrit

commit e798f4eaeecf87ea14d76b6729c76937ff7af110
Author: Damien Zammit 
Date:   Tue Jan 26 13:57:17 2016 +1100

mb/intel/d510mo: DSDT fix

Change-Id: I80853cadb4762d9bb34926e31d65d248c5683417
    Signed-off-by: Damien Zammit 
---
 src/mainboard/intel/d510mo/acpi/platform.asl | 28 ++++++++++++++++++++++++++++
 src/mainboard/intel/d510mo/dsdt.asl          |  5 ++++-
 2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/d510mo/acpi/platform.asl b/src/mainboard/intel/d510mo/acpi/platform.asl
new file mode 100644
index 0000000..6c92a4e
--- /dev/null
+++ b/src/mainboard/intel/d510mo/acpi/platform.asl
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Damien Zammit 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Method(_PIC, 1)
+{
+	/* Remember the OS' IRQ routing choice.  */
+	Store(Arg0, PICM)
+}
+
+/* SMI I/O Trap */
+Method(TRAP, 1, Serialized)
+{
+	Store (Arg0, SMIF)	/* SMI Function */
+	Store (0, TRP0)		/* Generate trap */
+	Return (SMIF)		/* Return value of SMI handler */
+}
diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl
index c1f72f9..a7788bd 100644
--- a/src/mainboard/intel/d510mo/dsdt.asl
+++ b/src/mainboard/intel/d510mo/dsdt.asl
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2015  Damien Zammit 
+ * Copyright (C) 2015 Damien Zammit 
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -23,8 +23,11 @@ DefinitionBlock(
    0x20090419	// OEM revision
 )
 {
+	#include "acpi/platform.asl"
    #include <southbridge/intel/i82801gx/acpi/globalnvs.asl>

+	#include <cpu/intel/common/acpi/cpu.asl>
+
    Scope (_SB) {
    	Device (PCI0)
    	{