Change in coreboot[master]: mb/google/brya/var/vell:Enable SaGv

[Robert Chen (Code Review)]

Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60811 )

Change subject: mb/google/brya/var/vell:Enable SaGv
......................................................................

mb/google/brya/var/vell:Enable SaGv

Enable SaGv support for vell

BUG=b:208719081
TEST=FW_NAME=vell emerge-brya coreboot

Change-Id: I01e3da449e2cf53278f625ca265d09f7a1869ef7
---
M src/mainboard/google/brya/variants/vell/memory.c
M src/mainboard/google/brya/variants/vell/overridetree.cb
2 files changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/60811/1

diff --git a/src/mainboard/google/brya/variants/vell/memory.c b/src/mainboard/google/brya/variants/vell/memory.c
index afbe114..caf237a 100644
--- a/src/mainboard/google/brya/variants/vell/memory.c
+++ b/src/mainboard/google/brya/variants/vell/memory.c
@@ -65,7 +65,8 @@
    	.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
    },

-	.ect = true, /* Enable Early Command Training */
+	.ect = 0, /* Early Command Training */
+	.UserBd =  BOARD_TYPE_ULT_ULX_T4,

.lp5x_config = {
    	.ccc_config = 0xff,
diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb
index fff53b6..fe929b5 100644
--- a/src/mainboard/google/brya/variants/vell/overridetree.cb
+++ b/src/mainboard/google/brya/variants/vell/overridetree.cb
@@ -32,6 +32,7 @@
    register "gpio_pm[COMM_3]" = "0"
    register "gpio_pm[COMM_4]" = "0"
    register "gpio_pm[COMM_5]" = "0"
+	register "SaGv" = "SaGv_Enabled"

# Intel Common SoC Config
    #+-------------------+---------------------------+