Change in ...coreboot[master]: src/soc/intel/skylake/romstage/romstage_fsp20.c: Add weak CAR pre-con...

Show replies by date

2164
days inactive
2164
days old

coreboot-gerrit@coreboot.org

0 comments
1 participants

Add to favorites Remove from favorites

tags (0)
participants (1)
  • Michał Żygowski (Code Review)