Change in ...coreboot[master]: soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix

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coreboot-gerrit@coreboot.org

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participants (4)
  • Aamir Bohra (Code Review)
  • Paul Menzel (Code Review)
  • Ronak Kanabar (Code Review)
  • Subrata Banik (Code Review)