Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49730 )
Change subject: soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16 ......................................................................
soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16
Change-Id: I97c73324900a0677165afa3f5b182a336d534968 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/49730 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Jason Glenesk jason.glenesk@gmail.com --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/Makefile.inc 2 files changed, 5 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Jason Glenesk: Looks good to me, but someone else must approve
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 1a38c77..83825cd 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -108,6 +108,10 @@ int default 64
+config MAX_CPUS + int + default 16 + config CONSOLE_UART_BASE_ADDRESS depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART hex diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 01dc97e..9a4aa80 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -2,6 +2,7 @@
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
+subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr
# Beware that all-y also adds the compilation unit to verstage on PSP