Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15209
-gerrit
commit c868c05c3af5ce1836bec6fc3baf2a4740fae8ca Author: Furquan Shaikh furquan@google.com Date: Wed Jun 15 17:13:20 2016 -0700
intel/apollolake: Run spi_init in ramstage
spi_init needs to run in ramstage to allow write protect to be disabled for eventlog and NVRAM updates.
Verified with this change that there are no more flash write/erase errors for ELOG/NVRAM.
BUG=chrome-os-partner:54458
Change-Id: Iff840e055548485e6521889fcf264a10fb5d9491 Signed-off-by: Furquan Shaikh furquan@google.com --- src/soc/intel/apollolake/chip.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 94a101f..c9b409a 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -31,6 +31,7 @@ #include <soc/intel/common/vbt.h> #include <soc/nvs.h> #include <soc/pci_devs.h> +#include <spi-generic.h>
#include "chip.h"
@@ -164,3 +165,14 @@ BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, fsp_notify_dummy, (void *) READY_TO_BOOT); BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, fsp_notify_dummy, (void *) READY_TO_BOOT); + +/* + * spi_init() needs to run unconditionally on every boot (including resume) to + * allow write protect to be disabled for eventlog and nvram updates. + */ +static void spi_init_cb(void *unused) +{ + spi_init(); +} + +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, spi_init_cb, NULL);