[XS] Change in coreboot[main]: nb/intel/sandybridge/raminit: Add tCPDED corner case

[Patrick Rudolph (Code Review)]

Attention is currently required from: Angel Pons.

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79762?usp=email )


Change subject: nb/intel/sandybridge/raminit: Add tCPDED corner case
......................................................................

nb/intel/sandybridge/raminit: Add tCPDED corner case

tCPDED is always 1, except for steppings earlier than SandyBridge D0.

Tested on Lenovo X220: Still boots and runs fine.

Change-Id: I5294173c02f06c601fdb13ed785ee33d7a4e3eca
Signed-off-by: Patrick Rudolph <[e-mail]>
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 5 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/79762/1

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 50c0fb4..de24400 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -172,7 +172,7 @@
 		.tXPDLL  = MIN(ctrl->tXPDLL, 31),
 		.tXP     = MIN(ctrl->tXP, 7),
 		.tAONPD  = ctrl->tAONPD,
-		.tCPDED  = 2,
+		.tCPDED  = 1,
 		.tPRPDEN = 1,
 	};
 
@@ -2822,7 +2822,10 @@
 		union tc_othp_reg tc_othp = {
 			.raw = mchbar_read32(TC_OTHP_ch(channel)),
 		};
-		tc_othp.tCPDED = 1;
+		if (IS_SANDY_CPU(ctrl->cpu) && (ctrl->cpu & 0xf) < SNB_STEP_D0)
+			tc_othp.tCPDED = 2;
+		else
+			tc_othp.tCPDED = 1;
 		mchbar_write32(TC_OTHP_ch(channel), tc_othp.raw);
 
 		/* 64 DCLKs until idle, decision per rank */

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I5294173c02f06c601fdb13ed785ee33d7a4e3eca
Gerrit-Change-Number: 79762
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: Angel Pons <[e-mail]>
Gerrit-Attention: Angel Pons <[e-mail]>
Gerrit-MessageType: newchange