Alexandru Gagniuc (alexandrux.gagniuc@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14585
-gerrit
commit 2bddbf3754fed27e719eb59fa2b50da893a9ffe1 Author: Alexandru Gagniuc alexandrux.gagniuc@intel.com Date: Wed Mar 30 14:38:44 2016 -0700
ec/google/chromeec/ec_lpc: Declare used IO ports as a resource
Chrome EC uses IO ports 0x800 -> 0x9ff to communicate over LPC; however, those ports were not declared as a resource. This had two major downsides: * It allowed the allocator to assign said ports to other devices * It required manually open up an IO window in the LPC bridge. The LPC bridge on many chromeec boards had to be painstakingly adjusted to meet these constraints.
The advantage of declaring the resources upfront is that the lpc bridge can now scan its child resources and automatically open up IO windows, as requested by its LPC children devices.
Change-Id: I35c4e48dddb7300674d7a9858b590c1f20e3b0e3 Signed-off-by: Alexandru Gagniuc alexandrux.gagniuc@intel.com --- src/ec/google/chromeec/ec_lpc.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 021735e..56196f0 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -409,7 +409,20 @@ static void lpc_ec_init(struct device *dev)
static void lpc_ec_read_resources(struct device *dev) { - /* Nothing, but this function avoids an error on serial console. */ + unsigned int idx = 0; + struct resource * res; + + /* + * Declare the IO ports that we are using: + * 0x800->0x8ff: Two successive HOST_CMD regions, each 0x80 bytes + * 0x900->0x9ff: EC memory (check ecmem.asl) + */ + res = new_resource(dev, idx++); + res->base = EC_HOST_CMD_REGION0; + res->size = 2 * EC_HOST_CMD_REGION_SIZE; + if (!IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP)) + res->size += EC_MEMMAP_SIZE; + res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; }
static void lpc_ec_enable_resources(struct device *dev)