New patch to review for coreboot: skylake: iomap: Remove unused RCBA region

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11533

-gerrit

commit f5567159bdf275eba08a3b349ccca7a08a6bb3a1
Author: Duncan Laurie 
Date:   Thu Aug 27 16:39:31 2015 -0700

skylake: iomap: Remove unused RCBA region

Remove the now unused RCBA base and size from iomap.h
    and fix a trivial typo that doesn't seem to get used
    anywhere.

BUG=chrome-os-partner:44622
    BRANCH=none
    TEST=emege-glados coreboot

Change-Id: If95dd2ee3f4a8dd0a6a7cf996aef8f19f27ddc48
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: ee7b1a8a75a9e9dc191c16ddc32b6a38acec398c
    Original-Change-Id: I0c49803d47105c3c55121caedaffaa249c4f0189
    Original-Signed-off-by: Duncan Laurie 
    Original-Reviewed-on: https://chromium-review.googlesource.com/295906
    Original-Reviewed-by: Aaron Durbin 
---
 src/soc/intel/skylake/include/soc/iomap.h | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h
index 916719d..333906b 100644
--- a/src/soc/intel/skylake/include/soc/iomap.h
+++ b/src/soc/intel/skylake/include/soc/iomap.h
@@ -28,7 +28,7 @@
 #define MCFG_BASE_SIZE		0x4000000

#define PCH_PCR_BASE_ADDRESS	0xfd000000
-#define PCH_BCR_BASE_SIZE	0x1000000
+#define PCH_PCR_BASE_SIZE	0x1000000

#define UART_DEBUG_BASE_ADDRESS	0xfe034000
 #define UART_DEBUG_BASE_SIZE	0x1000
@@ -48,10 +48,6 @@
 #define GDXC_BASE_ADDRESS	0xfed84000
 #define GDXC_BASE_SIZE		0x1000

-/* TODO: need to remove RCBA code after ASL clean up */
-#define RCBA_BASE_ADDRESS	0xfed1c000
-#define RCBA_BASE_SIZE		0x4000
-
 #define HPET_BASE_ADDRESS	0xfed00000

#define PCH_PWRM_BASE_ADDRESS	0xfe000000