New patch to review for coreboot: 345d136 mainboard/lenovo/g505s: Add VGA ASL to control LCD brightness
Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7652
-gerrit
commit 345d136c3edce257dc7b1cff588c39969a25fa22 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sat Dec 6 01:48:05 2014 +1100
mainboard/lenovo/g505s: Add VGA ASL to control LCD brightness
NOTFORMERGE - yet
Change-Id: I3c9cf9148c40a58c38a96a8dcde7e8399bccb4f2 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/lenovo/g505s/acpi/mainboard.asl | 24 ++- src/mainboard/lenovo/g505s/acpi/vga.asl | 280 ++++++++++++++++++++++++++ src/mainboard/lenovo/g505s/dsdt.asl | 4 + 3 files changed, 306 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index 2e87c2c..94da877 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -110,9 +110,29 @@ Scope (_SB) { /* Lid closed */ Method (LIDC) { /* Stub */ } /* Increase brightness */ - Method (BRTU) { /* Stub */ } + Method (BRTU) // _Q12 + { + // P80H is Port 80 for debug.. + //Store(0x12, P80H) + If (LEqual (^^PCI0.LIBR.EC0.BRTS, 0x0F)) + { +// when the screen brightness is full tilt do something? +// Notify(VPC0, 0x80) + } + Notify(^^PCI0.VGA.LCD, 0x86) + } /* Decrease brightness */ - Method (BRTD) { /* Stub */ } + Method (BRTD) // _Q11 + { + // P80H is Port 80 for debug.. + //Store(0x11, P80H) + If (LEqual (^^PCI0.LIBR.EC0.BRTS, Zero)) + { +// when the screen brightness is zero turn it off +// Notify(VPC0, 0x80) + } + Notify(^^PCI0.VGA.LCD, 0x87) + } /* Switch display */ Method (DSPS) { /* Stub */ } /* Toggle wireless */ diff --git a/src/mainboard/lenovo/g505s/acpi/vga.asl b/src/mainboard/lenovo/g505s/acpi/vga.asl new file mode 100644 index 0000000..2a8d357 --- /dev/null +++ b/src/mainboard/lenovo/g505s/acpi/vga.asl @@ -0,0 +1,280 @@ +Device (VGA) +{ + Name (_ADR, 0x00010000) // _ADR: Address + Name (PXEN, 0x80000000) + Name (PXID, 0x00020000) + Name (PXMX, 0x80000001) + Name (PXFX, 0x80000000) + Name (PXDY, 0x80000000) + Name (AF7E, 0x80000001) + OperationRegion (PCIG, PCI_Config, Zero, 0x50) + Field (PCIG, ByteAcc, NoLock, Preserve) + { + Offset (0x18), + GBA2, 32 + } + + OperationRegion (GFMM, SystemMemory, GBA2, 0x6000) + Field (GFMM, DWordAcc, NoLock, Preserve) + { + Offset (0x5F68), + AZPS, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (DOSA, Zero) + Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching + { + Store (Arg0, DOSA) + } + + Method (_DOD, 0, Serialized) // _DOD: Display Output Devices + { + Name (DODL, Package (0x05) + { + 0x00010100, + 0x00010110, + 0x0200, + 0x00010210, + 0x00010220 + }) + Return (DODL) + } + + Device (LCD) + { + Name (_ADR, 0x0110) // _ADR: Address + Name (BRLV, Package (0x12) + { + 0x4E, + 0x18, + One, + 0x06, + 0x0C, + 0x12, + 0x18, + 0x1E, + 0x24, + 0x2A, + 0x30, + 0x36, + 0x3C, + 0x42, + 0x48, + 0x4E, + 0x54, + 0x64 + }) + Name (BRTB, Package (0x10) {}) + Name (BRL2, Package (0x67) + { + 0x46, + 0x1E, + Zero, + One, + 0x02, + 0x03, + 0x04, + 0x05, + 0x06, + 0x07, + 0x08, + 0x09, + 0x0A, + 0x0B, + 0x0C, + 0x0D, + 0x0E, + 0x0F, + 0x10, + 0x11, + 0x12, + 0x13, + 0x14, + 0x15, + 0x16, + 0x17, + 0x18, + 0x19, + 0x1A, + 0x1B, + 0x1C, + 0x1D, + 0x1E, + 0x1F, + 0x20, + 0x21, + 0x22, + 0x23, + 0x24, + 0x25, + 0x26, + 0x27, + 0x28, + 0x29, + 0x2A, + 0x2B, + 0x2C, + 0x2D, + 0x2E, + 0x2F, + 0x30, + 0x31, + 0x32, + 0x33, + 0x34, + 0x35, + 0x36, + 0x37, + 0x38, + 0x39, + 0x3A, + 0x3B, + 0x3C, + 0x3D, + 0x3E, + 0x3F, + 0x40, + 0x41, + 0x42, + 0x43, + 0x44, + 0x45, + 0x46, + 0x47, + 0x48, + 0x49, + 0x4A, + 0x4B, + 0x4C, + 0x4D, + 0x4E, + 0x4F, + 0x50, + 0x51, + 0x52, + 0x53, + 0x54, + 0x55, + 0x56, + 0x57, + 0x58, + 0x59, + 0x5A, + 0x5B, + 0x5C, + 0x5D, + 0x5E, + 0x5F, + 0x60, + 0x61, + 0x62, + 0x63, + 0x64 + }) + Name (BRL3, Package (0x0D) + { + 0x64, + 0x43, + One, + 0x02, + 0x03, + 0x05, + 0x08, + 0x0C, + 0x12, + 0x1B, + 0x27, + 0x43, + 0x64 + }) + Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels + { + If (LEqual (^^^LIBR.EC0.OSTY, 0x02)) + { + Return (BRL3) + } + + If (LEqual (^^^LIBR.EC0.OSTY, 0x04)) + { + Return (BRL2) + } + Else + { + Return (BRLV) + } + } + + Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method + { + If (LEqual (AF7E, 0x80000001)) + { + Divide (Multiply (Arg0, 0xFF), 0x64, Local1, Local0) + If (LEqual (^^^LIBR.EC0.OSTY, 0x04)) + { + If (LEqual (Arg0, Zero)) + { + Store (One, Arg0) + } + + Store (Arg0, ^^^LIBR.EC0.BRTS) + } + + If (LEqual (^^^LIBR.EC0.OSTY, 0x03)) + { + Store (LVLS (Arg0), Local1) + Store (Local1, ^^^LIBR.EC0.BRTS) + //Notify (^^^LIBR.EC0.VPC0, 0x80) + } + + // ^^^AFN7 (Local0) + } + Else + { + //Acquire (^^^LIBR.PSMX, 0xFFFF) + Store (LVLS (Arg0), Local1) + Store (Local1, ^^^LIBR.EC0.BRTS) + Store (DerefOf (Index (BRTB, Local1)), Local2) + //Store (Local2, BRTL) + //Store (0x72, BCMD) + //BSMI (Zero) + //Notify (^^^LIBR.EC0.VPC0, 0x80) + //Release (^^^LIBR.PSMX) + } + } + + Method (LVLS, 1, NotSerialized) + { + Store (One, Local0) + Store (Zero, Local1) + While (Local0) + { + Add (Local1, 0x02, Local2) + Store (DerefOf (Index (BRLV, Local2)), Local3) + And (Arg0, 0xFF, Local4) + If (LEqual (Local4, Local3)) + { + Store (Zero, Local0) + } + + If (LGreaterEqual (Local1, 0x0F)) + { + Store (Zero, Local0) + } + + If (Local0) + { + Add (One, Local1, Local1) + } + } + + Return (Local1) + } + } + + // more?? +} diff --git a/src/mainboard/lenovo/g505s/dsdt.asl b/src/mainboard/lenovo/g505s/dsdt.asl index 96038ab..bfd16ac 100644 --- a/src/mainboard/lenovo/g505s/dsdt.asl +++ b/src/mainboard/lenovo/g505s/dsdt.asl @@ -75,6 +75,10 @@ DefinitionBlock ( #include "acpi/ec.asl" }
+ Scope(_SB.PCI0) { + #include "acpi/vga.asl" + } + /* Describe SMBUS for the Southbridge */ #include <southbridge/amd/agesa/hudson/acpi/smbus.asl>
-
Edward O'Callaghan