Change in coreboot[master]: mb/intel/adlrvp_m: Enable LTR for PCIE

[Bernardo Perez Priego (Code Review)]

Attention is currently required from: Ryan Albazzaz, Bernardo Perez Priego.
Hello Ryan A Albazzaz, Bora Guvendik, build bot (Jenkins), Ryan Albazzaz, Selma Bensaid, Tim Wawrzynczak,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/54492

to look at the new patch set (#2).

Change subject: mb/intel/adlrvp_m: Enable LTR for PCIE
......................................................................

mb/intel/adlrvp_m: Enable LTR for PCIE

BUG=none
TEST=Use command $ lspci -vv
     LTR+ is listed on DevCtl2

Signed-off-by: Bernardo Perez Priego 
Change-Id: If65d08a46b9e7304fbe4b92b7f1e6d4e08c599e7
---
M src/mainboard/intel/adlrvp/devicetree_m.cb
1 file changed, 8 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/54492/2