New patch to review for coreboot: northbridge/amd/agesa/family15*: Remove commented code
HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16896
-gerrit
commit 97a6a9086535179238f91aef73d8ad9e60f1f8ca Author: Elyes HAOUAS ehaouas@noos.fr Date: Wed Oct 5 20:22:29 2016 +0200
northbridge/amd/agesa/family15*: Remove commented code
Change-Id: If372655700c18340d51368a39392560f664f4a45 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/northbridge/amd/agesa/family12/amdfam12_conf.c | 34 ---------------------- src/northbridge/amd/agesa/family12/northbridge.c | 28 ------------------ src/northbridge/amd/agesa/family15/northbridge.c | 16 ---------- src/northbridge/amd/agesa/family15tn/northbridge.c | 13 --------- 4 files changed, 91 deletions(-)
diff --git a/src/northbridge/amd/agesa/family12/amdfam12_conf.c b/src/northbridge/amd/agesa/family12/amdfam12_conf.c index 64d904f..46af104 100644 --- a/src/northbridge/amd/agesa/family12/amdfam12_conf.c +++ b/src/northbridge/amd/agesa/family12/amdfam12_conf.c @@ -84,34 +84,11 @@ static void clear_ht_c_io_addr_reg(u32 nodeid, u32 linkn, u32 ht_c_index, #if !defined(__PRE_RAM__) static u32 get_io_addr_index(u32 nodeid, u32 linkn) { -#if 0 - u32 index; - - for (index = 0; index < 256; index++) { - if (sysconf.conf_io_addrx[index+4] == 0) { - sysconf.conf_io_addr[index+4] = (nodeid & 0x3f); - sysconf.conf_io_addrx[index+4] = 1 | ((linkn & 0x7)<<4); - return index; - } - } -#endif return 0; }
static u32 get_mmio_addr_index(u32 nodeid, u32 linkn) { -#if 0 - u32 index; - - for (index = 0; index < 64; index++) { - if (sysconf.conf_mmio_addrx[index+8] == 0) { - sysconf.conf_mmio_addr[index+8] = (nodeid & 0x3f); - sysconf.conf_mmio_addrx[index+8] = 1 | ((linkn & 0x7)<<4); - return index; - } - } -#endif - return 0; }
@@ -125,17 +102,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, pci_write_config32(__f1_dev[0], reg+4, tempreg);
tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? -#if 0 - // FIXME: can we use VGA reg instead? - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n", - __func__, dev_path(dev), link); - tempreg |= PCI_IO_BASE_VGA_EN; - } - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) { - tempreg |= PCI_IO_BASE_NO_ISA; - } -#endif pci_write_config32(__f1_dev[0], reg, tempreg); }
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index cfc3438..9b2634c 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -34,7 +34,6 @@ #include "sb_cimx.h" #include <northbridge/amd/agesa/agesawrapper.h>
-//#define FX_DEVS NODE_NUMS #define FX_DEVS 1
static device_t __f0_dev[FX_DEVS]; @@ -284,31 +283,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) mem_hole.node_id = 0; // record the node No with hole } } - -#if 0 - /* We need to double check if there is special set on base reg and limit reg - * are not continuous instead of hole, it will find out its hole_startk. - */ - if (mem_hole.node_id==-1) { - resource_t limitk_pri = 0; - struct dram_base_mask_t d; - resource_t base_k, limit_k; - d = get_dram_base_mask(0); - if (d.base & 1) { - base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; - if (base_k <= 4 *1024 * 1024) { - if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned)limitk_pri; // must be below 4G - mem_hole.node_id = 0; - } - } - - limit_k = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9; - limitk_pri = limit_k; - } - } -#endif - return mem_hole; } #endif @@ -772,7 +746,6 @@ static unsigned long agesa_write_acpi_tables(device_t device, if (srat != NULL) { memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } @@ -784,7 +757,6 @@ static unsigned long agesa_write_acpi_tables(device_t device, if (slit != NULL) { memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index f4ca7ed..daf1de7 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -83,17 +83,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, for (i = 0; i < node_nums; i++) pci_write_config32(__f1_dev[i], reg+4, tempreg); tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? -#if 0 - // FIXME: can we use VGA reg instead? - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n", - __func__, dev_path(dev), link); - tempreg |= PCI_IO_BASE_VGA_EN; - } - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) { - tempreg |= PCI_IO_BASE_NO_ISA; - } -#endif for (i = 0; i < node_nums; i++) pci_write_config32(__f1_dev[i], reg, tempreg); } @@ -465,7 +454,6 @@ static void scan_chains(device_t dev) if (nodeid == 0) { ASSERT(dev->bus->secondary == 0); for (link = dev->link_list; link; link = link->next) { - //if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[sblink] */ if (link->link_num == 0) { /* devicetree put IO Hub on link_lsit[0] */ io_hub = link->children; if (!io_hub || !io_hub->enabled) { @@ -544,7 +532,6 @@ static unsigned long agesa_write_acpi_tables(device_t device, if (srat != NULL) { memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } @@ -556,7 +543,6 @@ static unsigned long agesa_write_acpi_tables(device_t device, if (slit != NULL) { memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } @@ -820,8 +806,6 @@ static void domain_set_resources(device_t dev)
}
- //printk(BIOS_DEBUG, "node %d : mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", i, mmio_basek, basek, limitk); - /* split the region to accommodate pci memory space */ if ((basek < 4*1024*1024) && (limitk > mmio_basek)) { if (basek <= mmio_basek) { diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 5ffee60..4279ba2 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -82,17 +82,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, for (i = 0; i < node_nums; i++) pci_write_config32(__f1_dev[i], reg+4, tempreg); tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? -#if 0 - // FIXME: can we use VGA reg instead? - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n", - __func__, dev_path(dev), link); - tempreg |= PCI_IO_BASE_VGA_EN; - } - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) { - tempreg |= PCI_IO_BASE_NO_ISA; - } -#endif for (i = 0; i < node_nums; i++) pci_write_config32(__f1_dev[i], reg, tempreg); } @@ -813,8 +802,6 @@ static void domain_set_resources(device_t dev)
}
- //printk(BIOS_DEBUG, "node %d : mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", i, mmio_basek, basek, limitk); - /* split the region to accommodate pci memory space */ if ((basek < 4*1024*1024) && (limitk > mmio_basek)) { if (basek <= mmio_basek) {
-
HAOUAS Elyes