Change in coreboot[master]: soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC

[Sumeet R Pawnikar (Code Review)]

Attention is currently required from: Martin Roth, Patrick Rudolph.
Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52268 )

Change subject: soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC
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soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC

Add DPTF HIDs for thermal funcitonality for Alder Lake SoC.

BRANCH=None
BUG=None
TEST=Built and tested on adlrvp board

Change-Id: I8de58497fa800690d04abbdfe4d6abf1c0184334
Signed-off-by: Sumeet R Pawnikar 
---
M src/soc/intel/alderlake/Makefile.inc
A src/soc/intel/alderlake/dptf.c
2 files changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/52268/1

diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 5c1617b..7252085 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -30,6 +30,7 @@
 ramstage-y += acpi.c
 ramstage-y += chip.c
 ramstage-y += cpu.c
+ramstage-y += dptf.c
 ramstage-y += elog.c
 ramstage-y += espi.c
 ramstage-y += finalize.c
diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c
new file mode 100644
index 0000000..2af96df
--- /dev/null
+++ b/src/soc/intel/alderlake/dptf.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/intel/dptf/dptf.h>
+
+static const struct dptf_platform_info adl_dptf_platform_info = {
+	.use_eisa_hids = false,
+	/* _HID for the toplevel DPTF device, typically _SB.DPTF */
+	.dptf_device_hid = "INTC1041",
+	/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
+	.generic_hid = "INTC1046",
+	/* _HID for Intel DPTF Fan Device */
+	.fan_hid = "INTC1048",
+};
+
+const struct dptf_platform_info *get_dptf_platform_info(void)
+{
+	return &adl_dptf_platform_info;
+}