[XS] Change in coreboot[main]: mb/google/fatcat: Adjust EC host command range for microchip EC

[Subrata Banik (Code Review)]

Attention is currently required from: Pranava Y N, Subrata Banik.

Hello Anil Kumar K, Paul Menzel, Pranava Y N, Vijay P Hiremath, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84919?usp=email

to look at the new patch set (#2).

Change subject: mb/google/fatcat: Adjust EC host command range for microchip EC
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mb/google/fatcat: Adjust EC host command range for microchip EC

This commit adjusts the EC host command range for the Fatcat board to
0x800-0x807 & 0x200-0x20f.

This change is necessary because the microchip EC used on the Fatcat
board has a smaller host command range than the ITE/Nuvoton ECs used
on other Fatcat variants.

The `gen1_dec` register in the devicetree is updated to reflect this
change.

As per boot log, the `gen1_dec` aka offset 0x84, base address is 800
and size is 8 bytes.

AP FW Boot log:

[SPEW]   PCI: 00:00:1f.0 resource base 800 size 8 align 0 gran 0 limit 0 flags c0000100 index 84

BUG=b:376207365
TEST=Able to build and boot google/fatcat w/o any error.

without this patch:

[SPEW ]  LPC: Trying to open IO window from 800 size 8
    [ERROR]  LPC: Cannot open IO window: 800 size 8
    [ERROR]  No more IO windows

with this patch:

[SPEW ]  LPC: Trying to open IO window from 800 size 8

Change-Id: Ifcee533341fa583d841a4b564f25831c6d04e951
Signed-off-by: Subrata Banik 
---
M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
1 file changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/84919/2