[L] Change in coreboot[main]: soc/intel/pantherlake: Add FSP-S programming

[Jérémy Compostella (Code Review)]

Attention is currently required from: Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar.

Hello Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar, Subrata Banik, build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/c/coreboot/+/84552?usp=email

to look at the new patch set (#12).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)


Change subject: soc/intel/pantherlake: Add FSP-S programming
......................................................................

soc/intel/pantherlake: Add FSP-S programming

FSP-S UPDs are programmed according to the configuration (Kconfig and
device tree) in ramstage.

BUG=348678529
TEST=Hardware is programmed as desired and Intel Panther Lake
     reference board boots to UI.

Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989
Signed-off-by: Jeremy Compostella <[e-mail]>
---
M src/soc/intel/pantherlake/fsp_params.c
1 file changed, 735 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/84552/12
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Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989
Gerrit-Change-Number: 84552
Gerrit-PatchSet: 12
Gerrit-Owner: Jérémy Compostella <[e-mail]>
Gerrit-Reviewer: Kapil Porwal <[e-mail]>
Gerrit-Reviewer: Paul Menzel <[e-mail]>
Gerrit-Reviewer: Pranava Y N <[e-mail]>
Gerrit-Reviewer: Ronak Kanabar <[e-mail]>
Gerrit-Reviewer: Subrata Banik <[e-mail]>
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Gerrit-Attention: Jérémy Compostella <[e-mail]>
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