Jeremy Soller has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33940
Change subject: soc/intel/cannonlake: Fix outb order ......................................................................
soc/intel/cannonlake: Fix outb order
outb accepts a value followed by a port
Signed-off-by: Jeremy Soller jeremy@system76.com
Change-Id: I6fe3961b4f8cb2454e3b2564c3eae6af06c9e69d --- M src/soc/intel/cannonlake/lpc.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/33940/1
diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 6cc3451..1fe0416 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -201,10 +201,10 @@
/* Setup NMI on errors, disable SERR */ reg8 = (inb(0x61)) & 0xf0; - outb(0x61, (reg8 | (1 << 2))); + outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */ - outb(0x70, (1 << 7)); + outb((1 << 7), 0x70); };
void lpc_soc_init(struct device *dev)
Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33940 )
Change subject: soc/intel/cannonlake: Fix outb order ......................................................................
Patch Set 1: Code-Review+2
Hello Lance Zhao, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33940
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Fix outb order ......................................................................
soc/intel/cannonlake: Fix outb order
outb accepts a value followed by a port
Change-Id: I6fe3961b4f8cb2454e3b2564c3eae6af06c9e69d Signed-off-by: Jeremy Soller jeremy@system76.com --- M src/soc/intel/cannonlake/lpc.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/33940/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33940 )
Change subject: soc/intel/cannonlake: Fix outb order ......................................................................
Patch Set 2: Code-Review+1
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33940 )
Change subject: soc/intel/cannonlake: Fix outb order ......................................................................
soc/intel/cannonlake: Fix outb order
outb accepts a value followed by a port
Change-Id: I6fe3961b4f8cb2454e3b2564c3eae6af06c9e69d Signed-off-by: Jeremy Soller jeremy@system76.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33940 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Lance Zhao lance.zhao@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/cannonlake/lpc.c 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Lance Zhao: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 6cc3451..1fe0416 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -201,10 +201,10 @@
/* Setup NMI on errors, disable SERR */ reg8 = (inb(0x61)) & 0xf0; - outb(0x61, (reg8 | (1 << 2))); + outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */ - outb(0x70, (1 << 7)); + outb((1 << 7), 0x70); };
void lpc_soc_init(struct device *dev)