Hello Duan huayang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/44700
to review the following change.
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 242 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index dd80beb..e82f182 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -16,6 +16,7 @@ verstage-y += ../common/uart.c
romstage-y += ../common/cbmem.c +romstage-y += dramc_pi_main.c dramc_pi_basic_api.c dramc_utility.c romstage-y += emi.c romstage-y += flash_controller.c romstage-y += ../common/gpio.c gpio.c diff --git a/src/soc/mediatek/mt8192/dramc_pi_basic_api.c b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c new file mode 100644 index 0000000..9b1216c --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/gpio.h> +#include <soc/dramc_pi_api.h> +#include <soc/dramc_register.h> +#include <string.h> +#include <timer.h> + +void global_option_init(struct ddr_cali *cali) +{ +} + +void dfs_init_for_calibration(const struct ddr_cali *cali) +{ +} diff --git a/src/soc/mediatek/mt8192/dramc_pi_main.c b/src/soc/mediatek/mt8192/dramc_pi_main.c new file mode 100644 index 0000000..e2c7500 --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_pi_main.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_pi_api.h> +#include <soc/dramc_register.h> +#include <soc/mt6359p.h> + +static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) +{ + u32 vcore = get_vcore_value(cali); + + dramc_info("Set DRAM vcore voltage to %u\n", vcore); + mt6359p_buck_set_voltage(MT6359P_GPU11, vcore); +} + +static void dramc_calibration_all_channels(struct ddr_cali *cali) +{ +} + +void init_dram(const struct dramc_data *dparam) +{ + u32 bc_bak; + u8 k_shuffle, k_shuffle_end; + u8 pll_mode = 0; + bool first_freq_k = true; + + struct ddr_cali cali = {0}; + struct mr_values mr_value; + const struct ddr_base_info *ddr_info = &dparam->ddr_info; + + cali.pll_mode = &pll_mode; + cali.mr_value = &mr_value; + cali.support_ranks = ddr_info->support_ranks; + cali.cbt_mode[RANK_0] = ddr_info->cbt_mode[RANK_0]; + cali.cbt_mode[RANK_1] = ddr_info->cbt_mode[RANK_1]; + cali.emi_config = &ddr_info->emi_config; + + dramc_set_broadcast(DRAMC_BROADCAST_ON); + + global_option_init(&cali); + bc_bak = dramc_get_broadcast(); + dramc_set_broadcast(DRAMC_BROADCAST_OFF); + dramc_set_broadcast(bc_bak); + + if (ddr_info->config_dvfs == DRAMC_ENABLE_DVFS) + k_shuffle_end = CALI_SEQ_MAX; + else + k_shuffle_end = CALI_SEQ1; + + for (k_shuffle = CALI_SEQ0; k_shuffle < k_shuffle_end; k_shuffle++) { + set_cali_datas(&cali, dparam, k_shuffle); + set_vcore_voltage_for_each_freq(&cali); + dfs_init_for_calibration(&cali); + + dramc_calibration_all_channels(&cali); + + first_freq_k= false; + } +} diff --git a/src/soc/mediatek/mt8192/dramc_utility.c b/src/soc/mediatek/mt8192/dramc_utility.c new file mode 100644 index 0000000..526059a --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_utility.c @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_pi_api.h> +#include <soc/dramc_register.h> +#include <soc/infracfg.h> + +struct dfs_frequency_table { + u32 frequency; + dram_freq_grp freq_group; + dram_div_mode div_mode; + dram_dfs_shu shuffle_saved; + vref_cali_mode vref_cali; + u32 vcore; +}; + +static const struct dfs_frequency_table freq_shuffle_table[DRAM_DFS_SHU_MAX] = { + /* frequency freq_group div_mode shuffle_saved vref_cali vcore*/ + [CALI_SEQ0] = {800, DDRFREQ_800, DIV8_MODE, DRAM_DFS_SHU4, VREF_CALI_ON, 650000}, + [CALI_SEQ1] = {1200, DDRFREQ_1200, DIV8_MODE, DRAM_DFS_SHU2, VREF_CALI_ON, 662500}, + [CALI_SEQ2] = {600, DDRFREQ_600, DIV8_MODE, DRAM_DFS_SHU5, VREF_CALI_OFF, 650000}, + [CALI_SEQ3] = {933, DDRFREQ_933, DIV8_MODE, DRAM_DFS_SHU3, VREF_CALI_OFF, 662500}, + [CALI_SEQ4] = {400, DDRFREQ_400, DIV4_MODE, DRAM_DFS_SHU6, VREF_CALI_OFF, 650000}, + [CALI_SEQ5] = {2133, DDRFREQ_2133, DIV8_MODE, DRAM_DFS_SHU0, VREF_CALI_ON, 725000}, + [CALI_SEQ6] = {1600, DDRFREQ_1600, DIV8_MODE, DRAM_DFS_SHU1, VREF_CALI_OFF, 687500}, +}; + +void dramc_set_broadcast(u32 onoff) +{ + write32(&mt8192_infracfg->dramc_wbr, onoff); +} + +u32 dramc_get_broadcast(void) +{ + return read32(&mt8192_infracfg->dramc_wbr); +} + +u8 get_fsp(const struct ddr_cali *cali) +{ + return cali->fsp; +} + +dram_div_mode get_div_mode(const struct ddr_cali *cali) +{ + return cali->div_mode; +} + +dram_freq_grp get_freq_group(const struct ddr_cali *cali) +{ + return cali->freq_group; +} + +dbi_mode get_write_dbi(const struct ddr_cali *cali) +{ + return cali->w_dbi[get_fsp(cali)]; +} + +dram_odt_state get_odt_state(const struct ddr_cali *cali) +{ + return cali->odt_onoff; +} + +dram_dfs_shu get_shu(const struct ddr_cali *cali) +{ + return cali->shu; +} + +dram_cbt_mode get_cbt_mode(const struct ddr_cali *cali) +{ + return cali->cbt_mode[cali->rank]; +} + +u32 get_vcore_value(const struct ddr_cali *cali) +{ + return cali->vcore_voltage; +} + +u32 get_frequency(const struct ddr_cali *cali) +{ + return cali->frequency; +} + +vref_cali_mode get_vref_cali(const struct ddr_cali *cali) +{ + return cali->vref_cali; +} + +dram_pinmux_type get_pinmux_type(const struct ddr_cali *cali) +{ + return cali->pinmux_type; +} + +u8 get_mck2ui_div_shift(const struct ddr_cali *cali) +{ + if (get_div_mode(cali) == DIV4_MODE) + return 2; + else + return 3; +} + +dram_dfs_shu get_shu_save_by_k_shu(dram_cali_seq k_shu) +{ + return freq_shuffle_table[k_shu].shuffle_saved; +} + +dram_freq_grp get_freq_group_by_shu_save(dram_dfs_shu shu) +{ + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].shuffle_saved == shu) + return freq_shuffle_table[k_shu].freq_group; + + dramc_err("Invalid shuffle:%d\n", shu); + return DDRFREQ_800; +} + +u32 get_frequency_by_shu(dram_dfs_shu shu) +{ + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].shuffle_saved == shu) + return freq_shuffle_table[k_shu].frequency; + + dramc_err("Invalid shuffle:%d\n", shu); + return 800; +} + +dram_freq_grp get_highest_freq_group(void) +{ + dram_freq_grp highest_freq = DDRFREQ_800; + + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].freq_group > highest_freq) + highest_freq = freq_shuffle_table[k_shu].freq_group; + + dramc_dbg("Highest freq is :%d\n", highest_freq); + return highest_freq; +} + +void set_cali_datas(struct ddr_cali *cali, const struct dramc_data *dparam, dram_cali_seq k_shu) +{ + cali->chn = CHANNEL_A; + cali->rank = RANK_0; + cali->fsp = (freq_shuffle_table[k_shu].freq_group < DDRFREQ_1600) ? FSP_0 : FSP_1; + cali->w_dbi[FSP_0] = DBI_OFF; + cali->w_dbi[FSP_1] = DBI_ON; + cali->frequency = freq_shuffle_table[k_shu].frequency; + cali->freq_group = freq_shuffle_table[k_shu].freq_group; + cali->div_mode = freq_shuffle_table[k_shu].div_mode; + cali->shu = freq_shuffle_table[k_shu].shuffle_saved; + cali->vref_cali = freq_shuffle_table[k_shu].vref_cali; + cali->vcore_voltage = freq_shuffle_table[k_shu].vcore; + cali->odt_onoff = (cali->fsp == FSP_0) ? ODT_OFF : ODT_ON; + cali->params = &dparam->freq_params[cali->shu]; + + dramc_dbg("cali data(size:%ld) use fsp:%d, freq_group:%d, div_mode:%d, shu:%d, vref_cali:%d, odt_onoff:%d, vcore:%d\n", + sizeof(*cali), cali->fsp, cali->freq_group, cali->div_mode, cali->shu, + cali->vref_cali, cali->odt_onoff, cali->vcore_voltage); +} + +void dramc_auto_refresh_switch(u8 chn, bool enable) +{ + SET32_BITFIELDS(&ch[chn].ao.refctrl0, REFCTRL0_REFDIS, enable ? 0 : 1); + + if (!enable) { + udelay(READ32_BITFIELD(&ch[chn].nao.misc_statusa, + MISC_STATUSA_REFRESH_QUEUE_CNT)); + } +} diff --git a/src/soc/mediatek/mt8192/emi.c b/src/soc/mediatek/mt8192/emi.c index 9e48918..f83acd3 100644 --- a/src/soc/mediatek/mt8192/emi.c +++ b/src/soc/mediatek/mt8192/emi.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_pi_api.h>
size_t sdram_size(void) { @@ -11,4 +11,5 @@
void mt_set_emi(const struct dramc_data *dparam) { + init_dram(dparam); }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... PS1, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... PS1, Line 56: first_freq_k= false; spaces required around that '=' (ctx:VxW)
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... PS1, Line 3: #include <soc/gpio.h> : #include <soc/dramc_pi_api.h> : #include <soc/dramc_register.h> : #include <string.h> : #include <timer.h> humm?
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner, Duan huayang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44700
to look at the new patch set (#2).
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 242 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... PS2, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... PS2, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line
what's this meaning?
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/2/src/soc/mediatek/mt8192/dra... PS2, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line […]
it means nothing... Looks like Jenkins is tired 😄
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/3/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/3/src/soc/mediatek/mt8192/dra... PS3, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/4/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/4/src/soc/mediatek/mt8192/dra... PS4, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/5/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/5/src/soc/mediatek/mt8192/dra... PS5, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/6/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/6/src/soc/mediatek/mt8192/dra... PS6, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/6/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/6/src/soc/mediatek/mt8192/dra... PS6, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line
I think it's a false alarm, is it?
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/7/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/7/src/soc/mediatek/mt8192/dra... PS7, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/8/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/8/src/soc/mediatek/mt8192/dra... PS8, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/9/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/9/src/soc/mediatek/mt8192/dra... PS9, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... PS10, Line 5: #include <soc/mt6359p.h> @Xi, as discussed, please use regulator API
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... PS10, Line 12: mt6359p_buck_set_voltage ditto
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... PS10, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/11/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/11/src/soc/mediatek/mt8192/dr... PS11, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/12/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/12/src/soc/mediatek/mt8192/dr... PS12, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/14/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/14/src/soc/mediatek/mt8192/dr... PS14, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/15/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/15/src/soc/mediatek/mt8192/dr... PS15, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/16/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/16/src/soc/mediatek/mt8192/dr... PS16, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/17/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/17/src/soc/mediatek/mt8192/dr... PS17, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 18:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/18/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/18/src/soc/mediatek/mt8192/dr... PS18, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 19:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/19/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/19/src/soc/mediatek/mt8192/dr... PS19, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/20/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/20/src/soc/mediatek/mt8192/dr... PS20, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 21:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/21/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/21/src/soc/mediatek/mt8192/dr... PS21, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 22:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/22/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/22/src/soc/mediatek/mt8192/dr... PS22, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Yidi Lin has uploaded a new patch set (#24) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 242 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/24
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 24:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/24/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/24/src/soc/mediatek/mt8192/dr... PS24, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 26:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/26/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/26/src/soc/mediatek/mt8192/dr... PS26, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 27:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/27/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/27/src/soc/mediatek/mt8192/dr... PS27, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 28:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 28:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line
bot makes a mistake?
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 28:
(11 comments)
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 17: /* frequency freq_group div_mode shuffle_saved vref_cali vcore*/ Given that the struct definition is few lines above, I don't think we need this comment.
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 111: : One space after ":".
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 121: : One space after ":".
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 125: get_highest_freq_group Doesn't this always return DDRFREQ_2133?
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 133: : Same.
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 141: freq_shuffle_table[k_shu] Declare a local variable for this?
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: : One space after ":"
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: ( One space before "("
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: dramc_dbg("cali data(size:%ld) use fsp:%d, freq_group:%d, div_mode:%d, shu:%d, vref_cali:%d, odt_onoff:%d, vcore:%d\n", Line too long (> 96 chars)
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 162: { No need for parentheses.
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 164: MISC_STATUSA_REFRESH_QUEUE_CNT Please align with "READ32_BITFIELD".
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 30:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/30/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/30/src/soc/mediatek/mt8192/dr... PS30, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 31:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/31/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/31/src/soc/mediatek/mt8192/dr... PS31, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/32/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/32/src/soc/mediatek/mt8192/dr... PS32, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 33:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/33/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/33/src/soc/mediatek/mt8192/dr... PS33, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Yidi Lin has uploaded a new patch set (#34) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 242 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/34
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 34:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... PS34, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 34:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... PS34, Line 122: 800 Write
dramc_err("Invalid shuffle: %d; using k_shu = %d", shu, CALI_SEQ0); return freq_shuffle_table[CALI_SEQ0].frequency;
Yidi Lin has uploaded a new patch set (#36) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 242 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/36
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 36:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/36/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/36/src/soc/mediatek/mt8192/dr... PS36, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Xi Chen has uploaded a new patch set (#37) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 243 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/37
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 37:
(14 comments)
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... PS10, Line 5: #include <soc/mt6359p.h>
@Xi, as discussed, please use regulator API
Done
https://review.coreboot.org/c/coreboot/+/44700/10/src/soc/mediatek/mt8192/dr... PS10, Line 12: mt6359p_buck_set_voltage
ditto
Done
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 17: /* frequency freq_group div_mode shuffle_saved vref_cali vcore*/
Given that the struct definition is few lines above, I don't think we need this comment.
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 111: :
One space after ":".
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 121: :
One space after ":".
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 125: get_highest_freq_group
Doesn't this always return DDRFREQ_2133?
8192 may be configured as max freq DDRFREQ_1600, this function returns the max freq that is configured not the HW max spec.
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 133: :
Same.
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 141: freq_shuffle_table[k_shu]
Declare a local variable for this?
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: :
One space after ":"
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: dramc_dbg("cali data(size:%ld) use fsp:%d, freq_group:%d, div_mode:%d, shu:%d, vref_cali:%d, odt_onoff:%d, vcore:%d\n",
Line too long (> 96 chars)
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 153: (
One space before "("
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 162: {
No need for parentheses.
Ack
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 164: MISC_STATUSA_REFRESH_QUEUE_CNT
Please align with "READ32_BITFIELD".
Ack
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/34/src/soc/mediatek/mt8192/dr... PS34, Line 122: 800
Write […]
Ack
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 37:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... PS37, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 37:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... PS37, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line
Can remove this build bot message? It shows too many times.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 37:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/37/src/soc/mediatek/mt8192/dr... PS37, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
Can remove this build bot message? It shows too many times.
pgeorgi@, could you take a look at this? Does the build bot use the latest checkpatch.pl?
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 38:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/38/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/38/src/soc/mediatek/mt8192/dr... PS38, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 39:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/39/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/39/src/soc/mediatek/mt8192/dr... PS39, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 40:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/40/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/40/src/soc/mediatek/mt8192/dr... PS40, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Xi Chen has uploaded a new patch set (#41) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 243 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/41
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali) that open brace { should be on the previous line
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
that open brace { should be on the previous line
I really wonder why buildbot would alert on this.
maybe something wrong in the header files?
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
I really wonder why buildbot would alert on this. […]
I found that if function name contains 'for_each_', such alert is occurred.
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
I found that if function name contains 'for_each_', such alert is occurred.
Yes, i also found this problem. I checked checkpatch.pl, it seems to do a match "xxxfor_eachxxx", which may be used for linux list macro: list_for_each_xxx, but i think the script is wrong.
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 7: static void set_vcore_voltage_for_each_freq(const struct ddr_cali *cali)
Yes, i also found this problem. […]
@pgeorgi: could you please help to review the modification on checkpatch.pl? https://review.coreboot.org/c/coreboot/+/48560/4
I have verified locally, for the whole coreboot source code, may need more test.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 41:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44700/1/src/soc/mediatek/mt8192/dra... PS1, Line 3: #include <soc/gpio.h> : #include <soc/dramc_pi_api.h> : #include <soc/dramc_register.h> : #include <string.h> : #include <timer.h>
humm?
Ack
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 3: #include <soc/gpio.h> : #include <soc/dramc_pi_api.h> : #include <soc/dramc_register.h> : #include <string.h> : #include <timer.h> : Please remove unused header files and keep only the one where you declared global_option_init and dfs_init_for_calibration.
Xi Chen has uploaded a new patch set (#42) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 239 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/42
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 42:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44700/41/src/soc/mediatek/mt8192/dr... PS41, Line 3: #include <soc/gpio.h> : #include <soc/dramc_pi_api.h> : #include <soc/dramc_register.h> : #include <string.h> : #include <timer.h> :
Please remove unused header files and keep only the one where you declared global_option_init and df […]
Done
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 42:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/42/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/42/src/soc/mediatek/mt8192/dr... PS42, Line 7: set_vcore_voltage_for_each_freq before the checkpatch is fixed, do you mind changing the function name?
I think it may be easier to just call it
set_vcore_voltage
or
set_vcore_voltage_by_frequency
or anything that works.
Xi Chen has uploaded a new patch set (#43) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 239 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/43
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/42/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/42/src/soc/mediatek/mt8192/dr... PS42, Line 7: set_vcore_voltage_for_each_freq
before the checkpatch is fixed, do you mind changing the function name? […]
Ack
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/28/src/soc/mediatek/mt8192/dr... PS28, Line 125: get_highest_freq_group
8192 may be configured as max freq DDRFREQ_1600, this function returns the max freq that is configur […]
Ack
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43:
(3 comments)
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 53: Maybe no need for the extra blank line
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 138: struct dfs_frequency_table shuffle = freq_shuffle_table[k_shu]; Use a pointer:
const struct dfs_frequency_table *shuffle = &freq_shuffle_table[k_shu];
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 154: use fsp Just "fsp"
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43: -Code-Review
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 43:
(3 comments)
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 53:
Maybe no need for the extra blank line
Actually, we want to seperate the init and calibration codes using the blank~
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_utility.c:
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 138: struct dfs_frequency_table shuffle = freq_shuffle_table[k_shu];
Use a pointer: […]
Ack
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 154: use fsp
Just "fsp"
Ack
Xi Chen has uploaded a new patch set (#44) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 239 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/44
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 44:
error: initialization discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers] struct dfs_frequency_table *shuffle = &freq_shuffle_table[k_shu];
Xi Chen has uploaded a new patch set (#45) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 239 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/44700/45
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 45:
Patch Set 44:
error: initialization discards 'const' qualifier from pointer target type [-Werror=discarded-qualifiers] struct dfs_frequency_table *shuffle = &freq_shuffle_table[k_shu];
fix it.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 45: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_main.c:
https://review.coreboot.org/c/coreboot/+/44700/43/src/soc/mediatek/mt8192/dr... PS43, Line 53:
Actually, we want to seperate the init and calibration codes using the blank~
Ack
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
Patch Set 45: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44700 )
Change subject: soc/mediatek/mt8192: Do dramc init settings ......................................................................
soc/mediatek/mt8192: Do dramc init settings
Signed-off-by: Huayang Duan huayang.duan@mediatek.com Change-Id: Ie4877b69de1bfa4ff981d8eb386efbddb9e0f5c2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44700 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8192/Makefile.inc A src/soc/mediatek/mt8192/dramc_pi_basic_api.c A src/soc/mediatek/mt8192/dramc_pi_main.c A src/soc/mediatek/mt8192/dramc_utility.c M src/soc/mediatek/mt8192/emi.c 5 files changed, 239 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index cf09b3c..1f70e43 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -25,6 +25,7 @@
romstage-y += ../common/auxadc.c romstage-y += ../common/cbmem.c +romstage-y += dramc_pi_main.c dramc_pi_basic_api.c dramc_utility.c romstage-y += emi.c romstage-y += flash_controller.c romstage-y += ../common/gpio.c gpio.c diff --git a/src/soc/mediatek/mt8192/dramc_pi_basic_api.c b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c new file mode 100644 index 0000000..aacb1ef --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_pi_api.h> + +void global_option_init(struct ddr_cali *cali) +{ +} + +void dfs_init_for_calibration(const struct ddr_cali *cali) +{ +} diff --git a/src/soc/mediatek/mt8192/dramc_pi_main.c b/src/soc/mediatek/mt8192/dramc_pi_main.c new file mode 100644 index 0000000..a2a4dea --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_pi_main.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_pi_api.h> +#include <soc/dramc_register.h> +#include <soc/regulator.h> + +static void set_vcore_voltage(const struct ddr_cali *cali) +{ + u32 vcore = get_vcore_value(cali); + + dramc_info("Set DRAM vcore voltage to %u\n", vcore); + mainboard_set_regulator_vol(MTK_REGULATOR_VCORE, vcore); +} + +static void dramc_calibration_all_channels(struct ddr_cali *cali) +{ +} + +void init_dram(const struct dramc_data *dparam) +{ + u32 bc_bak; + u8 k_shuffle, k_shuffle_end; + u8 pll_mode = 0; + bool first_freq_k = true; + + struct ddr_cali cali = {0}; + struct mr_values mr_value; + const struct ddr_base_info *ddr_info = &dparam->ddr_info; + + cali.pll_mode = &pll_mode; + cali.mr_value = &mr_value; + cali.support_ranks = ddr_info->support_ranks; + cali.cbt_mode[RANK_0] = ddr_info->cbt_mode[RANK_0]; + cali.cbt_mode[RANK_1] = ddr_info->cbt_mode[RANK_1]; + cali.emi_config = &ddr_info->emi_config; + + dramc_set_broadcast(DRAMC_BROADCAST_ON); + + global_option_init(&cali); + bc_bak = dramc_get_broadcast(); + dramc_set_broadcast(DRAMC_BROADCAST_OFF); + dramc_set_broadcast(bc_bak); + + if (ddr_info->config_dvfs == DRAMC_ENABLE_DVFS) + k_shuffle_end = CALI_SEQ_MAX; + else + k_shuffle_end = CALI_SEQ1; + + for (k_shuffle = CALI_SEQ0; k_shuffle < k_shuffle_end; k_shuffle++) { + set_cali_datas(&cali, dparam, k_shuffle); + set_vcore_voltage(&cali); + dfs_init_for_calibration(&cali); + + dramc_calibration_all_channels(&cali); + + first_freq_k = false; + } +} diff --git a/src/soc/mediatek/mt8192/dramc_utility.c b/src/soc/mediatek/mt8192/dramc_utility.c new file mode 100644 index 0000000..71a7eb6 --- /dev/null +++ b/src/soc/mediatek/mt8192/dramc_utility.c @@ -0,0 +1,167 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/dramc_pi_api.h> +#include <soc/dramc_register.h> +#include <soc/infracfg.h> + +struct dfs_frequency_table { + u32 frequency; + dram_freq_grp freq_group; + dram_div_mode div_mode; + dram_dfs_shu shuffle_saved; + vref_cali_mode vref_cali; + u32 vcore; +}; + +static const struct dfs_frequency_table freq_shuffle_table[DRAM_DFS_SHU_MAX] = { + [CALI_SEQ0] = {800, DDRFREQ_800, DIV8_MODE, DRAM_DFS_SHU4, VREF_CALI_ON, 650000}, + [CALI_SEQ1] = {1200, DDRFREQ_1200, DIV8_MODE, DRAM_DFS_SHU2, VREF_CALI_ON, 662500}, + [CALI_SEQ2] = {600, DDRFREQ_600, DIV8_MODE, DRAM_DFS_SHU5, VREF_CALI_OFF, 650000}, + [CALI_SEQ3] = {933, DDRFREQ_933, DIV8_MODE, DRAM_DFS_SHU3, VREF_CALI_OFF, 662500}, + [CALI_SEQ4] = {400, DDRFREQ_400, DIV4_MODE, DRAM_DFS_SHU6, VREF_CALI_OFF, 650000}, + [CALI_SEQ5] = {2133, DDRFREQ_2133, DIV8_MODE, DRAM_DFS_SHU0, VREF_CALI_ON, 725000}, + [CALI_SEQ6] = {1600, DDRFREQ_1600, DIV8_MODE, DRAM_DFS_SHU1, VREF_CALI_OFF, 687500}, +}; + +void dramc_set_broadcast(u32 onoff) +{ + write32(&mt8192_infracfg->dramc_wbr, onoff); +} + +u32 dramc_get_broadcast(void) +{ + return read32(&mt8192_infracfg->dramc_wbr); +} + +u8 get_fsp(const struct ddr_cali *cali) +{ + return cali->fsp; +} + +dram_div_mode get_div_mode(const struct ddr_cali *cali) +{ + return cali->div_mode; +} + +dram_freq_grp get_freq_group(const struct ddr_cali *cali) +{ + return cali->freq_group; +} + +dbi_mode get_write_dbi(const struct ddr_cali *cali) +{ + return cali->w_dbi[get_fsp(cali)]; +} + +dram_odt_state get_odt_state(const struct ddr_cali *cali) +{ + return cali->odt_onoff; +} + +dram_dfs_shu get_shu(const struct ddr_cali *cali) +{ + return cali->shu; +} + +dram_cbt_mode get_cbt_mode(const struct ddr_cali *cali) +{ + return cali->cbt_mode[cali->rank]; +} + +u32 get_vcore_value(const struct ddr_cali *cali) +{ + return cali->vcore_voltage; +} + +u32 get_frequency(const struct ddr_cali *cali) +{ + return cali->frequency; +} + +vref_cali_mode get_vref_cali(const struct ddr_cali *cali) +{ + return cali->vref_cali; +} + +dram_pinmux_type get_pinmux_type(const struct ddr_cali *cali) +{ + return cali->pinmux_type; +} + +u8 get_mck2ui_div_shift(const struct ddr_cali *cali) +{ + if (get_div_mode(cali) == DIV4_MODE) + return 2; + else + return 3; +} + +dram_dfs_shu get_shu_save_by_k_shu(dram_cali_seq k_shu) +{ + return freq_shuffle_table[k_shu].shuffle_saved; +} + +dram_freq_grp get_freq_group_by_shu_save(dram_dfs_shu shu) +{ + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].shuffle_saved == shu) + return freq_shuffle_table[k_shu].freq_group; + + dramc_err("Invalid shuffle: %d\n", shu); + return DDRFREQ_800; +} + +u32 get_frequency_by_shu(dram_dfs_shu shu) +{ + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].shuffle_saved == shu) + return freq_shuffle_table[k_shu].frequency; + + dramc_err("Invalid shuffle: %d, using k_shu = %d\n", shu, CALI_SEQ0); + return freq_shuffle_table[CALI_SEQ0].frequency; +} + +dram_freq_grp get_highest_freq_group(void) +{ + dram_freq_grp highest_freq = DDRFREQ_800; + + for (u8 k_shu = CALI_SEQ0; k_shu < CALI_SEQ_MAX; k_shu++) + if (freq_shuffle_table[k_shu].freq_group > highest_freq) + highest_freq = freq_shuffle_table[k_shu].freq_group; + + dramc_dbg("Highest freq is: %d\n", highest_freq); + return highest_freq; +} + +void set_cali_datas(struct ddr_cali *cali, const struct dramc_data *dparam, dram_cali_seq k_shu) +{ + const struct dfs_frequency_table *shuffle = &freq_shuffle_table[k_shu]; + + cali->chn = CHANNEL_A; + cali->rank = RANK_0; + cali->fsp = (shuffle->freq_group < DDRFREQ_1600) ? FSP_0 : FSP_1; + cali->w_dbi[FSP_0] = DBI_OFF; + cali->w_dbi[FSP_1] = DBI_ON; + cali->frequency = shuffle->frequency; + cali->freq_group = shuffle->freq_group; + cali->div_mode = shuffle->div_mode; + cali->shu = shuffle->shuffle_saved; + cali->vref_cali = shuffle->vref_cali; + cali->vcore_voltage = shuffle->vcore; + cali->odt_onoff = (cali->fsp == FSP_0) ? ODT_OFF : ODT_ON; + cali->params = &dparam->freq_params[cali->shu]; + + dramc_dbg("cali data (size: %ld) fsp: %d, freq_group: %d, div_mode: %d, " + "shu: %d, vref_cali: %d, odt_onoff: %d, vcore: %d\n", + sizeof(*cali), cali->fsp, cali->freq_group, cali->div_mode, cali->shu, + cali->vref_cali, cali->odt_onoff, cali->vcore_voltage); +} + +void dramc_auto_refresh_switch(u8 chn, bool enable) +{ + SET32_BITFIELDS(&ch[chn].ao.refctrl0, REFCTRL0_REFDIS, enable ? 0 : 1); + + if (!enable) + udelay(READ32_BITFIELD(&ch[chn].nao.misc_statusa, + MISC_STATUSA_REFRESH_QUEUE_CNT)); +} diff --git a/src/soc/mediatek/mt8192/emi.c b/src/soc/mediatek/mt8192/emi.c index 9e48918..f83acd3 100644 --- a/src/soc/mediatek/mt8192/emi.c +++ b/src/soc/mediatek/mt8192/emi.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_pi_api.h>
size_t sdram_size(void) { @@ -11,4 +11,5 @@
void mt_set_emi(const struct dramc_data *dparam) { + init_dram(dparam); }
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