Change in coreboot[master]: soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMI

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50617 )

Change subject: soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMI
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soc/amd/cezanne: Add uart.c to smm so we can support DEBUG_SMI

Signed-off-by: Raul E Rangel 
Change-Id: Ife43352db564654ed538383a157431ee10856518
---
M src/soc/amd/cezanne/Makefile.inc
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/50617/1

diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index e6bccc3..55298d0 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -35,6 +35,7 @@
 ramstage-y	+= uart.c

smm-y		+= smihandler.c
+smm-$(CONFIG_DEBUG_SMI) += uart.c

CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne