Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30741
Change subject: intel/fsp1_0: Add option to select FSP debug level ......................................................................
intel/fsp1_0: Add option to select FSP debug level
Useful for debugging FSP.
Change-Id: I06e837cf1b051c55a531c3361e94fa1449bc8526 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/drivers/intel/fsp1_0/Kconfig M src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c 2 files changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/30741/1
diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index c7f6c18..de26782 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -41,6 +41,16 @@ help The path and filename of the Intel FSP binary for this platform.
+config FSP_1_0_DEBUG_LEVEL + int "FSP debug level (0-3)" + default 0 + help + Select the debug level, where: + 0: DISABLED + 1: MINIMUM + 2: NORMAL + 3: MAXIMUM + endif #HAVE_FSP_BIN
config FSP_LOC diff --git a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c index 578a0d0..7e00338 100644 --- a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c @@ -76,6 +76,8 @@ UpdData->SerialPortConfigure = 0; }
+ UpdData->DebugOutputLevel = CONFIG_FSP_1_0_DEBUG_LEVEL; + /* * Memory Down */
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30741 )
Change subject: intel/fsp1_0: Add option to select FSP debug level ......................................................................
Patch Set 5: Code-Review+2
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30741 )
Change subject: intel/fsp1_0: Add option to select FSP debug level ......................................................................
Patch Set 5: Code-Review+1
Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30741 )
Change subject: intel/fsp1_0: Add option to select FSP debug level ......................................................................
intel/fsp1_0: Add option to select FSP debug level
Useful for debugging FSP.
Change-Id: I06e837cf1b051c55a531c3361e94fa1449bc8526 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/30741 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Jay Talbott JayTalbott@sysproconsulting.com --- M src/drivers/intel/fsp1_0/Kconfig M src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c 2 files changed, 13 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Jay Talbott: Looks good to me, but someone else must approve
diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index c7f6c18..b26976a 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -34,6 +34,17 @@ hex default 0x4000
+config FSP_1_0_DEBUG_LEVEL + int "FSP debug level (0-3)" + default 0 + range 0 3 + help + Select the debug level, where: + 0: DISABLED + 1: MINIMUM + 2: NORMAL + 3: MAXIMUM + if HAVE_FSP_BIN
config FSP_FILE diff --git a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c index b64efce..ef6212e 100644 --- a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c @@ -69,6 +69,8 @@ if (!IS_ENABLED(CONFIG_CONSOLE_SERIAL)) UpdData->SerialPortType = 0;
+ UpdData->DebugOutputLevel = CONFIG_FSP_1_0_DEBUG_LEVEL; + /* * Memory Down */
-
Jay Talbott (Code Review) -
Nico Huber (Code Review)
-
Patrick Rudolph (Code Review)