Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
azalia: Treat all negative return values as errors
Instead of checking whether the return value equals -1, just check if it is negative. Some Azalia implementations already do it, but most do not.
Change-Id: I43ce72a01c07eff62d645db28c09584b386532ff Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/device/azalia_device.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 6 files changed, 43 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/46727/1
diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 279f8a1..4ab45bc 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -40,7 +40,7 @@ int count;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* clear STATESTS bits (BAR + 0xe)[2:0] */ @@ -62,11 +62,11 @@ goto no_codec;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -166,7 +166,7 @@ printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -174,7 +174,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -192,12 +192,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n"); diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index 15be4ab..b91151a 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -46,7 +46,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ @@ -142,7 +142,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -150,7 +150,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -168,12 +168,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -188,12 +188,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 99582b4..6cf1fea 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index 1d1405e..0e0ccd6 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -187,12 +187,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index 3fa344d..3b2289ed 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -187,12 +187,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index 011bde6..c947092 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -42,7 +42,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ @@ -138,7 +138,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -146,7 +146,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -164,12 +164,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -185,12 +185,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } }
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46727
to look at the new patch set (#4).
Change subject: azalia: Treat all negative return values as errors ......................................................................
azalia: Treat all negative return values as errors
Instead of checking whether the return value equals -1, just check if it is negative. Some Azalia implementations already do it, but most do not.
Change-Id: I43ce72a01c07eff62d645db28c09584b386532ff Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/device/azalia_device.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 6 files changed, 43 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/46727/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
Patch Set 4: Code-Review+1
Hello build bot (Jenkins), Paul Menzel, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46727
to look at the new patch set (#6).
Change subject: azalia: Treat all negative return values as errors ......................................................................
azalia: Treat all negative return values as errors
Instead of checking whether the return value equals -1, just check if it is negative. Some Azalia implementations already do it, but most do not.
Change-Id: I43ce72a01c07eff62d645db28c09584b386532ff Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/device/azalia_device.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 6 files changed, 43 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/46727/6
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
Patch Set 11:
Why not make azalia code return >1 values for errors and return 0 for success, so checks can be done like if(!whatever())?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
Patch Set 11:
Patch Set 11:
Why not make azalia code return >1 values for errors and return 0 for success, so checks can be done like if(!whatever())?
I just wanted to uniformize the checks across all Azalia implementations, since soc/intel/broadwell uses the soc/intel/common implementation. Ideally, we would only have one copy of this code. Ideally.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
Patch Set 11: Code-Review+2
Patch Set 11:
Patch Set 11:
Why not make azalia code return >1 values for errors and return 0 for success, so checks can be done like if(!whatever())?
I just wanted to uniformize the checks across all Azalia implementations, since soc/intel/broadwell uses the soc/intel/common implementation. Ideally, we would only have one copy of this code. Ideally.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46727 )
Change subject: azalia: Treat all negative return values as errors ......................................................................
azalia: Treat all negative return values as errors
Instead of checking whether the return value equals -1, just check if it is negative. Some Azalia implementations already do it, but most do not.
Change-Id: I43ce72a01c07eff62d645db28c09584b386532ff Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46727 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/device/azalia_device.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 6 files changed, 43 insertions(+), 43 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Michael Niewöhner: Looks good to me, approved
diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 279f8a1..4ab45bc 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -40,7 +40,7 @@ int count;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* clear STATESTS bits (BAR + 0xe)[2:0] */ @@ -62,11 +62,11 @@ goto no_codec;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -166,7 +166,7 @@ printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -174,7 +174,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -192,12 +192,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n"); diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index 15be4ab..b91151a 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -46,7 +46,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ @@ -142,7 +142,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -150,7 +150,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -168,12 +168,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -188,12 +188,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 99582b4..6cf1fea 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index 1d1405e..0e0ccd6 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -187,12 +187,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index 3fa344d..3b2289ed 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -43,11 +43,11 @@ u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ @@ -140,7 +140,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -148,7 +148,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -166,12 +166,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -187,12 +187,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } } diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index 011bde6..c947092 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -42,7 +42,7 @@ u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1) + if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) goto no_codec;
/* Write back the value once reset bit is set. */ @@ -138,7 +138,7 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) { + if (wait_for_ready(base) < 0) { printk(BIOS_DEBUG, " codec not ready.\n"); return; } @@ -146,7 +146,7 @@ reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) { + if (wait_for_valid(base) < 0) { printk(BIOS_DEBUG, " codec not valid.\n"); return; } @@ -164,12 +164,12 @@
/* 3 */ for (i = 0; i < verb_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, verb[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } printk(BIOS_DEBUG, "Azalia: verb loaded.\n"); @@ -185,12 +185,12 @@ }
for (i = 0; i < pc_beep_verbs_size; i++) { - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) < 0) return;
write32(base + HDA_IC_REG, pc_beep_verbs[i]);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) < 0) return; } }
-
Angel Pons (Code Review) -
Michael Niewöhner (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)